Thin film transistor array panel and a method for manufacturing the same

    公开(公告)号:US10128274B2

    公开(公告)日:2018-11-13

    申请号:US15434374

    申请日:2017-02-16

    Inventor: Jae Woo Jeong

    Abstract: A thin film transistor array panel including: a substrate; a semiconductor layer disposed on the substrate; a source electrode and a drain electrode overlapping the semiconductor layer, and a gate electrode overlapping the semiconductor layer; and a first ohmic contact disposed between the semiconductor layer and the source electrode and a second ohmic contact disposed between the semiconductor layer and the drain electrode. The semiconductor layer includes a channel part that does not overlap the source electrode and the drain electrode. The first ohmic contact includes a first edge and the second ohmic contact includes a second edge. The first and second edges face each other across the channel part of the semiconductor layer. The first edge of the first ohmic contact is protruded from the source electrode toward the channel part and the second edge of the second ohmic contact is protruded from the drain electrode toward the channel part.

    Touch sensor and manufacturing method thereof, and display device including the same

    公开(公告)号:US10761626B2

    公开(公告)日:2020-09-01

    申请号:US15953047

    申请日:2018-04-13

    Abstract: A touch sensor according to an exemplary embodiment includes: a substrate; a first sense electrode that is disposed on the substrate and extends in a first direction; a first insulation layer that covers the substrate and the first sense electrode; and a second sense electrode that is disposed in the first insulation layer and extends in a second direction that crosses the first direction, wherein an upper surface of the second sense electrode is disposed on the same plane as an upper surface of the first insulation layer.

    Display device and method of manufacturing the same

    公开(公告)号:US12211943B2

    公开(公告)日:2025-01-28

    申请号:US17665350

    申请日:2022-02-04

    Abstract: A display device includes a substrate, a semiconductor layer, an insulating layer, and a conductive layer. The semiconductor layer is disposed on the substrate, includes a channel of a first transistor, and includes a channel of a second transistor. The insulating layer is disposed on the semiconductor layer. The conductive layer is disposed on the insulating layer, includes a gate electrode of the first transistor, and includes a gate electrode of the second transistor. The channel of the first transistor includes a first first-element impurity ion and a second-element impurity ion different from the first first-element impurity ion. The channel of the second transistor includes a second first-element impurity ion identical to the first first-element impurity ion.

    DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20230005966A1

    公开(公告)日:2023-01-05

    申请号:US17665350

    申请日:2022-02-04

    Abstract: A display device includes a substrate, a semiconductor layer, an insulating layer, and a conductive layer. The semiconductor layer is disposed on the substrate, includes a channel of a first transistor, and includes a channel of a second transistor. The insulating layer is disposed on the semiconductor layer. The conductive layer is disposed on the insulating layer, includes a gate electrode of the first transistor, and includes a gate electrode of the second transistor. The channel of the first transistor includes a first first-element impurity ion and a second-element impurity ion different from the first first-element impurity ion. The channel of the second transistor includes a second first-element impurity ion identical to the first first-element impurity ion.

    Manufacturing method of thin film transistor display panel
    10.
    发明授权
    Manufacturing method of thin film transistor display panel 有权
    薄膜晶体管显示面板的制造方法

    公开(公告)号:US09502536B2

    公开(公告)日:2016-11-22

    申请号:US14795578

    申请日:2015-07-09

    Abstract: Provided is a manufacturing method of a thin film transistor array panel including: formation of a gate line including a gate electrode on a substrate; formation of sequentially a gate insulating layer, an active layer, a data metal layer, and a photoresist etching mask pattern on the gate line; etching the data metal layer with the same shape as the photoresist etching mask pattern; etching the active layer by using the photoresist etching mask pattern; formation of a data line including a source electrode and a drain electrode for completing a channel region on the active layer; and formation of a pixel electrode exposing the drain electrode and electrically connected with the drain electrode, in which in the etching of the active layer, a dry-etch process is performed by using gas including at least one of NF3 and H2.

    Abstract translation: 提供一种薄膜晶体管阵列面板的制造方法,包括:在基板上形成包括栅电极的栅极线; 在栅极线上依次形成栅极绝缘层,有源层,数据金属层和光致抗蚀剂蚀刻掩模图案; 以与光致抗蚀剂蚀刻掩模图案相同的形状蚀刻数据金属层; 通过使用光致抗蚀剂蚀刻掩模图案蚀刻有源层; 形成包括用于完成有源层上的沟道区的源电极和漏电极的数据线; 以及形成暴露漏电极并与漏电极电连接的像素电极,其中在有源层的蚀刻中,通过使用包括NF 3和H 2中的至少一个的气体进行干蚀刻工艺。

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