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公开(公告)号：US20240172530A1
公开(公告)日：2024-05-23
申请号：US17784643
申请日：2021-08-17
Inventor： Lu Bai , Yang Zhou , Xin Zhang , Junxiu Dai , Yi Zhang , Tinghua Shang , Bo Zhang , Yao Huang , Song Liu
IPC: H10K59/80 , H10K59/131
CPC classification number: H10K59/873 , H10K59/131
Abstract: A display substrate includes at least two barrier layers in a peripheral area of the display substrate. The at least two barrier layers includes a first barrier layer forming an enclosure; and a third barrier layer on a side of the first barrier layer closer to a display area. The third barrier layer includes one or more discontinuous portions.
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公开(公告)号：US11796844B2
公开(公告)日：2023-10-24
申请号：US17504535
申请日：2021-10-19
Inventor： Yong Deng , Sijun Lei , Yansheng Sun , Yuxu Geng , Hebing Ma , Chaojie Zhang , Wencheng Luo , Pingjia Yu , Jingru Hu , Jian Chen , Rong Huang , Haixu Zou , Xinzhi Shao , Song Liu , Lv Lv
IPC: G02F1/13 , G02F1/1339 , G02F1/1347 , G02F1/1335
CPC classification number: G02F1/1323 , G02F1/1339 , G02F1/1347 , G02F1/133531 , G02F2202/28
Abstract: A display device and a manufacturing method thereof are provided. The display device includes a first liquid crystal panel for displaying a picture, a second liquid crystal panel for switching between a privacy mode and a sharing mode, and a back light assembly for emitting light; the second liquid crystal panel is disposed on a light-emitting side of the back light assembly; the first liquid crystal panel is disposed on a side of the second liquid crystal panel away from the back light assembly, and a spacer film is disposed between the first liquid crystal panel and the second liquid crystal panel, and is attached to the second liquid crystal panel.
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公开(公告)号：US11156765B2
公开(公告)日：2021-10-26
申请号：US16902658
申请日：2020-06-16
Inventor： Dengqian Li , Yansheng Sun , Liang Gao , Sijun Lei , Yuxu Geng , Chaojie Zhang , Jian Chen , Song Liu , Wei Dai , Fengzhen Bu
IPC: F21V8/00
Abstract: A back plate includes a base plate, a plurality of connecting plates and a plurality of support plates. The base plate has a first surface. The plurality of connecting plates are fixed to at least two edges of the base plate, and each connecting plate extends along a direction substantially perpendicular to the first surface. Each support plate is fixed to an end of a respective one of the plurality of connecting plates away from the base plate, and is substantially parallel to the first surface.
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公开(公告)号：US10809565B2
公开(公告)日：2020-10-20
申请号：US16343367
申请日：2018-08-02
Inventor： Sen Tan , Sijun Lei , Liang Gao , Yansheng Sun , Hebing Ma , Wei Fu , Wencheng Luo , Qihai Du , Yuxu Geng , Qiangsheng Han , Song Liu
IPC: G02F1/03 , G02F1/13357 , G02F1/1333 , G02F1/1335
Abstract: A backlight module includes: light sources; a light guide plate disposed at a side of the light sources, the light guide plate including a second light guide portion disposed adjacent to the light sources and a first light guide portion disposed on a side of the second light portion away from the light sources, a thickness of the second light guide portion being greater than a thickness of the first light guide portion; and a back plate including a first back plate portion disposed at a side of the light sources away from the light guide plate and a second back plate portion disposed at a side of the light guide plate which is opposite to a light exit side of the light guide plate.
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公开(公告)号：US20190204686A1
公开(公告)日：2019-07-04
申请号：US16334193
申请日：2018-05-15
Inventor： Sen Tan , Sijun Lei , Liang Gao , Yansheng Sun , Wencheng Luo , Wei Fu , Qihai Du , Song Liu , Yuxu Geng , Hebing Ma , Na Shao
IPC: G02F1/1335 , H01S5/00 , H01S5/042
CPC classification number: G02F1/133621 , G02F1/1336 , H01S5/005 , H01S5/0425
Abstract: The present disclosure provides a light source assembly, a backlight module, and a display device. The light source assembly includes: at least one semiconductor laser, at least one beam expander, and a package; the at least one semiconductor laser and the at least one beam expander are in one-to-one correspondence and are all encapsulated in the package; each of the at least one beam expander is disposed on a side of a light emitting surface of a corresponding one of the at least one semiconductor laser; light emitted by each of the at least one semiconductor laser is expanded by a corresponding one of the at least one beam expander and then emitted from the package.
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Patent Agency Ranking
公开(公告)号：US10211821B2
公开(公告)日：2019-02-19
申请号：US15710317
申请日：2017-09-20
Inventor： Guohuo Su , Zhihua Sun , Xu Zhang , Zhihao Zhang , Guangquan He , Song Liu
Abstract: Embodiments of the present disclosure provide a clock signal transmission circuit, a driving method thereof, a gate driving circuit, and a display device. The clock signal transmission circuit includes an input circuit, a pull-up circuit, a reset circuit, a pull-down control circuit, a pull-down circuit, and a pull-up holding circuit. According to an embodiment of the present disclosure, the clock signal source can be disconnected from each shift register unit in the gate driving circuit before a screen is displayed, preventing malfunctions of the gate driving circuit caused by an undesired high voltage on the clock signal line.
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公开(公告)号：US12236845B2
公开(公告)日：2025-02-25
申请号：US17907936
申请日：2021-09-29
IPC: G09G3/32 , H01L25/075 , H01L25/16 , H01L27/12 , H01L33/62
Abstract: A display substrate includes a first voltage line, an alternating current signal line and a second voltage line arranged on a substrate, the substrate includes a display region and a non-display region; the display substrate further includes a first conductive layer, a first insulation layer and a second conductive layer laminated one on another on the substrate, the first voltage line and the alternating current signal line are arranged on the first conductive layer, and the second voltage line is arranged on the second conductive layer; the first voltage line is lapped onto the second voltage line through a first groove penetrating through the first insulation layer; and an orthogonal projection of the second voltage line onto the substrate overlaps an orthogonal projection of the alternating current signal line onto the substrate at an overlapping region.
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公开(公告)号：US11024657B2
公开(公告)日：2021-06-01
申请号：US16318740
申请日：2018-04-02
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Zhengliang Li , Ce Ning , Song Liu , Wenlin Zhang , Xuefei Sun
IPC: H01L27/12
Abstract: The present disclosure provides a transistor, an array substrate and a method of manufacturing the array substrate, and a display device. The method of manufacturing the array substrate comprises: depositing a plurality of silicon oxide layers on an active layer of a transistor; and depositing a silicon oxynitride layer over the plurality of silicon oxide layers.
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公开(公告)号：US20210331167A1
公开(公告)日：2021-10-28
申请号：US16475035
申请日：2018-08-01
Applicant: BOE Technology Group Co., Ltd.
Inventor： Xiaochen Ma , Guangcai Yuan , Ce Ning , Song Liu
IPC: B01L3/00 , G01N27/414
Abstract: The present application provides a micro-channel structure. The micro-channel structure includes a base substrate; a rail layer on the base substrate and including a first rail and a second rail spaced apart from each other; and a wall layer on a side of the rail layer distal to the base substrate, and including a first wall and a second wall at least partially spaced apart from each other, thereby forming a micro-channel between the first wall and the second wall. The micro-channel has an extension direction along a plane substantially parallel to a main surface of the base substrate, the extension direction being substantially parallel to extension directions of the first rail and the second rail along the plane substantially parallel to the main surface of the base substrate.
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公开(公告)号：US20210217784A1
公开(公告)日：2021-07-15
申请号：US16761335
申请日：2019-11-21
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Zhengliang Li , Jiayu He , Hehe Hu , Wenlin Zhang , Song Liu , Xiaochen Ma , Nianqi Yao , Jie Huang
IPC: H01L27/144
Abstract: An array substrate, a method for manufacturing an array substrate, and a display panel are provided. The array substrate includes: a base substrate; a thin film transistor on the base substrate; and a PIN diode on a side of the thin film transistor away from the base substrate, in a direction running away the base substrate from the thin film transistor, the PIN diode including a first electrical conduction type semiconductor layer and an intrinsic semiconductor layer and a second electrical conduction type semiconductor layer stacked in sequence, wherein a material from which the first electrical conduction type semiconductor layer is made includes one or more of following materials: metal oxide, metal sulfide, metal selenide, metal nitride, metal phosphide, or metal arsenide.
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