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    MICROELECTRONIC ASSEMBLIES
    1.
    发明申请
    MICROELECTRONIC ASSEMBLIES 有权

    公开(公告)号：US20250046625A1

    公开(公告)日：2025-02-06

    申请号：US18733052

    申请日：2024-06-04

    Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

    Inventor： Belgacem Haba

    IPC: H01L21/56 ,  H01L21/768 ,  H01L21/82 ,  H01L23/31 ,  H01L23/528

    Abstract: Various embodiments of fanout packages are disclosed. A method of forming a microelectronic assembly is disclosed. The method can include bonding a first surface of at least one microelectronic substrate to a surface of a carrier using a direct bonding technique without an intervening adhesive, the microelectronic substrate having a plurality of conductive interconnections on at least one surface of the microelectronic substrate. The method can include applying a molding material to an area of the surface of the carrier surrounding the microelectronic substrate to form a reconstituted substrate. The method can include processing the microelectronic substrate. The method can include singulating the reconstituted substrate at the area of the surface of the carrier and at the molding material to form the microelectronic assembly.

    INTEGRATED CIRCUITS WITH CAPACITORS
    2.
    发明申请
    INTEGRATED CIRCUITS WITH CAPACITORS 有权

    公开(公告)号：US20250038104A1

    公开(公告)日：2025-01-30

    申请号：US18759139

    申请日：2024-06-28

    Applicant: Adeia Semiconductor Bonding Technologies Inc.

    Inventor： Rajesh Katkar ,  Belgacem Haba

    IPC: H01L23/522 ,  H01L23/00 ,  H01L23/528 ,  H01L25/065 ,  H01L25/16 ,  H01L29/94

    Abstract: A component comprises a substrate comprising a first side and a second side opposite to the first side. A first dielectric layer is formed on the first side, and a plurality of electrically conductive pads extend through the first dielectric layer. A second dielectric layer is formed on the second side, and a plurality of electrically conductive pads extend through the second dielectric layer. A plurality of capacitors are each formed in an opening that extends at least partially from the first side towards the second side of the substrate. Each of the capacitors comprises at least three electrodes. At least one of the plurality of capacitors is coupled on the first side to an electrically conductive pad of the first dielectric layer and is coupled on the second side to an electrically conductive pad of the second dielectric layer.

    CONDUCTIVE MATERIALS FOR DIRECT BONDING
    4.
    发明申请
    CONDUCTIVE MATERIALS FOR DIRECT BONDING 有权

    公开(公告)号：US20250006679A1

    公开(公告)日：2025-01-02

    申请号：US18391173

    申请日：2023-12-20

    Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.

    Inventor： Jeremy Alfred Theil ,  Cyprian Emeka Uzoh ,  Guilian Gao ,  Belgacem Haba ,  Laura Wills Mirkarimi

    IPC: H01L23/00

    Abstract: A structure includes a first substrate including a first layer having at least one electrically conductive first portion and at least one electrically insulative second portion and a second substrate including a second layer having at least one electrically conductive third portion and at least one electrically insulative fourth portion. The structure further includes an interface layer having at least one electrically conductive oxide material between the first layer and the second layer. The at least one electrically conductive oxide material includes at least one first region between and in electrical communication with the at least one electrically conductive first portion and the at least one electrically conductive third portion, and at least one second region between the at least one electrically insulative second portion and the at least one electrically insulative fourth portion.

    DIRECTLY BONDED OPTICAL COMPONENTS
    5.
    发明申请
    DIRECTLY BONDED OPTICAL COMPONENTS 有权

    公开(公告)号：US20250004197A1

    公开(公告)日：2025-01-02

    申请号：US18745266

    申请日：2024-06-17

    Applicant: Adeia Semiconductor Bonding Technologies Inc.

    Inventor： Belgacem Haba ,  Rajesh Katkar ,  Mani Hossein-Zadeh

    IPC: G02B6/12

    Abstract: A directly bonded optical component comprising one or more optical channels is disclosed. The directly bonded optical component can include at least a first optical element and a second optical element directly bonded to the first optical element without an intervening adhesive. The optical component can include a first optical channel through at least a portion of the first optical element, the first optical channel extending between a first port at a first side of the optical component and a second port at a second side of the optical component. A second optical channel or waveguide can extend through at least a portion of the second optical element from a third port at the first side of the optical component to a fourth port. The first and third ports can be separated by a first distance and the second and fourth parts can be separated a second distance along an exterior surface of the optical component. The first distance can be different from the second distance.

    Embedded cooling assemblies for advanced device packaging and methods of manufacturing the same
    6.
    发明授权
    Embedded cooling assemblies for advanced device packaging and methods of manufacturing the same 有权

    公开(公告)号：US12183659B2

    公开(公告)日：2024-12-31

    申请号：US18397505

    申请日：2023-12-27

    Applicant: Adeia Semiconductor Bonding Technologies Inc.

    Inventor： Belgacem Haba

    IPC: H01L23/473 ,  H01L23/00 ,  H01L23/427 ,  H01L23/467 ,  H01L25/18 ,  H10B80/00

    Abstract: A device package may include a package substrate, a package cover disposed on the package substrate, and an integrated cooling assembly disposed between the package substrate and the package cover. The package cover generally has an inlet opening and an outlet opening disposed there through. The integrated cooling assembly includes a semiconductor device and a cold plate attached to the semiconductor device. The device package may include a material layer between the package cover and the cold plate. The cold plate may include a patterned first side and an opposite second side. The patterned first side may include a base surface and sidewalls extending downward from the base surface, where the base surface is spaced apart from the semiconductor device to collectively define a coolant channel. Here, the coolant channel is in fluid communication with the inlet opening and the outlet opening through openings disposed through respective portions of the material layer.

    Microelectronic assemblies
    9.
    发明授权
    Microelectronic assemblies 有权

    公开(公告)号：US12046482B2

    公开(公告)日：2024-07-23

    申请号：US17937593

    申请日：2022-10-03

    Applicant: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES, INC.

    Inventor： Belgacem Haba

    IPC: H01L21/56 ,  H01L21/768 ,  H01L21/82 ,  H01L23/31 ,  H01L23/528

    CPC classification number: H01L21/565 ,  H01L21/76819 ,  H01L21/76877 ,  H01L21/82 ,  H01L23/3107 ,  H01L23/528 ,  H01L2224/02379

    Abstract: Various embodiments of fanout packages are disclosed. A method of forming a microelectronic assembly is disclosed. The method can include bonding a first surface of at least one microelectronic substrate to a surface of a carrier using a direct bonding technique without an intervening adhesive, the microelectronic substrate having a plurality of conductive interconnections on at least one surface of the microelectronic substrate. The method can include applying a molding material to an area of the surface of the carrier surrounding the microelectronic substrate to form a reconstituted substrate. The method can include processing the microelectronic substrate. The method can include singulating the reconstituted substrate at the area of the surface of the carrier and at the molding material to form the microelectronic assembly.

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