公开(公告)号：US06792401B1

公开(公告)日：2004-09-14

申请号：US09703215

申请日：2000-10-31

申请人： Richard Nigro ,  Werner Kraemer ,  Robert J. Holicky ,  Richard B. Mallinson

发明人： Richard Nigro ,  Werner Kraemer ,  Robert J. Holicky ,  Richard B. Mallinson

IPC分类号： G06F748

CPC分类号： G02C13/003 ,  G06Q30/0643

摘要： An Internet-based optical imaging system to gather anthropometric data for the purpose of enabling national and international commerce in the wearable goods market, including accurate measurement for selecting, fitting, and ordering eyeglasses and eyeglass frames via the Internet that includes vendor support interaction. A customer can view and orient his or her real-time image, wear a sales item on a virtual personal model, and order selected sales item via the Internet access. The customer's 2-D photoimagery/textured 3-D model and logistics data are acquired at a modeling kiosk that, for eyeglasses, includes specific vendor specification items, pupilary, bridge, and temple distances necessary for a specific customer. Internet data paths from the modeling kiosk node to vendor nodes, such as point-of-sale and manufacturers, and the customer's home computer, can-be provided. The system uses at least one digital camera and least one pattern projector to obtain 2-D/3-D imaging simultaneously with the interaction and use of texture generation for extremely accurate measurements.

摘要翻译： 一种基于互联网的光学成像系统，用于收集人体测量数据，以便在可穿戴产品市场上实现国家和国际商务，包括通过互联网选​​择，配置和订购眼镜和眼镜框架的准确测量，其中包括供应商支持交互。 客户可以查看和定位他或她的实时图像，在虚拟个人模型上佩戴销售物品，并通过互联网访问订购所选的销售物品。 客户的2-D光刻/纹理三维模型和物流数据在建模亭收购，对于眼镜，包括特定供应商规格项目，特定客户所需的瞳孔，桥梁和寺庙距离。 可以提供从建模报亭节点到供应商节点（例如销售点和制造商）以及客户家庭计算机的互联网数据路径。 该系统使用至少一个数码相机和至少一个图案投影仪，可以与纹理生成的相互作用和使用同时获得2-D / 3-D成像，从而进行非常精确的测量。

公开(公告)号：US06772103B1

公开(公告)日：2004-08-03

申请号：US09308278

申请日：1999-07-09

申请人： David W. King

发明人： David W. King

IPC分类号： G06F748

CPC分类号： G01L19/0007 ,  G06Q10/087 ,  G06Q10/0875

摘要： A method for selecting a parts kit detail for the installation of a pressure transducer on a container such as a pipeline or a vessel, the container for containing a fluid material, the method including two steps. The first step is to establish at least two different installation categories, each such different installation category being defined by the properties of the fluid material. The second step is to establish at least two different parts kit details, at least two of such different parts kit details being applicable to the different installation categories.

摘要翻译： 一种用于选择在诸如管道或容器的容器上安装压力传感器的零件工具箱细节的方法，用于容纳流体材料的容器，该方法包括两个步骤。 第一步是建立至少两个不同的安装类别，每个这样不同的安装类别由流体材料的属性定义。 第二步是建立至少两个不同的零件套件详细信息，至少两个这样不同的零件套件细节适用于不同的安装类别。

公开(公告)号：US06542859B1

公开(公告)日：2003-04-01

申请号：US09643904

申请日：2000-08-21

申请人： Donald W. Burns ,  John R. Louie

发明人： Donald W. Burns ,  John R. Louie

IPC分类号： G06F748

CPC分类号： G06F17/5018 ,  Y02T10/82

摘要： A method for analyzing and designing structures with structural aliasing. The concept of structural aliasing applies in one embodiment of the present invention to structural systems which are cyclically symmetric. In analyzing and designing structural systems such as wheel assemblies of gas turbine engines, it is possible to group the discrete components so as to aliasingly couple particular ordered excitations and harmonic families. With structural aliasing, it is possible to couple the ordered excitations and harmonic families such that resonant response of the wheel assembly does not occur within the operating range of the engine, and also to have the resonant vibratory mode excited in such a manner that the drive coupling of the wheel dampens the wheel assembly.

摘要翻译： 一种用结构混叠分析和设计结构的方法。 结构混叠的概念在本发明的一个实施例中适用于循环对称的结构系统。 在分析和设计诸如燃气轮机发动机的轮组件的结构系统时，可以对分立部件进行分组，以便将特定的有序激励和谐波系列进行混叠。 通过结构混叠，可以耦合有序的激励和谐波族，使得车轮组件的谐振响应不会在发动机的工作范围内发生，并且还使谐振振动模式以这样的方式激励，即驱动 车轮联轴器阻止车轮组件。

公开(公告)号：US06789240B2

公开(公告)日：2004-09-07

申请号：US10335837

申请日：2003-01-02

申请人： Sreenivasan K. Koduri

发明人： Sreenivasan K. Koduri

IPC分类号： G06F748

CPC分类号： H01L24/85 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45014 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/4845 ,  H01L2224/48463 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/78301 ,  H01L2224/85201 ,  H01L2224/85205 ,  H01L2224/859 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/0102 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/01026 ,  H01L2924/01004 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2924/013 ,  H01L2924/00013

摘要： A computerized system and method for inspecting and measuring a ball-shaped wire bond formed by an automated bonder pre-programmed to attach a connecting bond onto a bond pad of an integrated circuit by first obtaining a first image of said bond pad before bond attachment, then determining the coordinates of the center of said pad. Second, the bonder is instructed to attach a ball-shaped wire bond to the center of said pad. Next, a second image of said bond pad is obtained after bond attachment; this second image comprises an image of the ball-shaped portion of the bond and an image of the wire portion of said bond. The coordinates of the center of the ball-shaped portion of the bond are obtained by computer processing of the first and second images. The coordinates of the bond center and the pad center are compared, creating information for quality control of the bonder instruction and the bonding process. Finally, the bond process quality is controlled by inputting new bonder instruction for correcting any identified differences between the center coordinates.

摘要翻译： 一种计算机化系统和方法，用于检查和测量由预编程的自动化接合器形成的球形线接合件，以通过在接合附接之前首先获得所述接合焊盘的第一图像，以将连接接合附接到集成电路的接合焊盘上， 然后确定所述垫的中心的坐标。 其次，指示接合器将球形引线接合到所述垫的中心。 接下来，在粘合附着后获得所述接合焊盘的第二图像; 该第二图像包括接合的球形部分的图像和所述键的线部分的图像。 通过第一和第二图像的计算机处理获得接合的球形部分的中心的坐标。 比较焊接中心和焊盘中心的坐标，创建焊接机指令质量控制和焊接过程的信息。 最后，通过输入新的粘合剂指令来校正中心坐标之间的任何识别的差异来控制粘合过程质量。

公开(公告)号：US06609143B1

公开(公告)日：2003-08-19

申请号：US09600622

申请日：2000-07-20

申请人： Tomochika Kanakogi ,  Masaitsu Nakajima

发明人： Tomochika Kanakogi ,  Masaitsu Nakajima

IPC分类号： G06F748

CPC分类号： G06F7/5324 ,  G06F7/5338 ,  G06F7/5443 ,  G06F2207/382 ,  G06F2207/3828

摘要： It is an object of the present invention to provide an arithmetic logic unit that can perform a sum-of-products operation in a reduced number of processing cycles without carrying out data transfer and additions even in obtaining a single result from a plurality of divided input data words. Data words X and Y are input. A product of the high-order bits of X and Y is calculated using first decoder 511, first selector 521, first partial product generator 531 and first full adder 541. A product of the low-order bits of X and Y is also calculated using second decoder 512, second selector 522, second partial product generator 532 and second full adder 542. These products are adaptively shifted at a shifter 55 and then added up with a fed back data word Z at a third full adder 56 and a carry-propagation adder 58. In this manner, the data word Z, representing the result of the sum-of-products operation, is obtained.

摘要翻译： 本发明的目的是提供一种算术逻辑单元，其可以在减少数量的处理周期中执行产品总和运算，而不进行数据传送和添加，即使从多个分割输入获得单个结果 数据字。数据字X和Y被输入。 使用第一解码器511，第一选择器521，第一部分积发生器531和第一全加器541计算X和Y的高位的乘积.X和Y的低位的乘积也使用 第二解码器512，第二选择器522，第二部分乘积发生器532和第二全加器542.这些乘积在移位器55处自适应地移位，然后在第三全加器56和进位传播中加上反馈数据字Z 以这种方式，获得表示产品总和运算结果的数据字Z。

公开(公告)号：US06516332B1

公开(公告)日：2003-02-04

申请号：US08921703

申请日：1997-09-02

申请人： Robert Carter

发明人： Robert Carter

IPC分类号： G06F748

CPC分类号： G06F9/30014 ,  G06F7/026 ,  G06F7/483 ,  G06F2207/3832

摘要： The floating point number data processing means is for use in microprocessor systems and finds application in AC motor drive technology. The format used includes a sign bit, a seven bit signed exponent and an eight bit mantissa. The mathematical functions are performed in a gate array using registers which are mapped into a memory of the microprocessor system, the particular mathematical function being dependent upon a particular choice of registers. An unsigned integer comparison of floating point numbers is used to give a correct result.

摘要翻译： 浮点数数据处理装置用于微处理器系统，并在AC电动机驱动技术中得到应用。所使用的格式包括符号位，七位有符号指数和八位元素。数学函数在门阵列 使用映射到微处理器系统的存储器的寄存器，特定的数学函数取决于寄存器的特定选择。 使用浮点数的无符号整数比较来给出正确的结果。

公开(公告)号：US06282557B1

公开(公告)日：2001-08-28

申请号：US09207483

申请日：1998-12-08

申请人： Sang Hoo Dhong ,  Hung Cai Ngo ,  Kevin John Nowka

发明人： Sang Hoo Dhong ,  Hung Cai Ngo ,  Kevin John Nowka

IPC分类号： G06F748

CPC分类号： G06F7/5443 ,  G06F7/5318

摘要： A low latency fused multiply-adder for adding a product of a first binary number and a second binary number to a third binary number is disclosed. The low latency fused multiply-adder includes a partial product generation module, a partial product reduction module, and a carry propagate adder. The partial product generation module generates a set of partial products from the first binary number and the second binary number. Coupled to the partial product generation module, the partial product reduction module combines the set of partial products with the third binary number to produce a redundant Sum and a redundant Carry. Finally, the carry propagate adder adds the redundant Sum and the redundant Carry to yield a Sum Total.

摘要翻译： 公开了一种用于将第一二进制数和第二二进制数的乘积加到第三个二进制数的低延迟融合乘法加法器。 低延迟融合乘法器包括部分乘积生成模块，部分乘积减少模块和进位传播加法器。 部分乘积生成模块从第一二进制数和第二二进制数生成一组部分乘积。 与部分产品生成模块相结合，部分产品减少模块将部分产品集合与第三个二进制数组合，以产生冗余Sum和冗余进位。 最后，进位传播加法器将冗余Sum和冗余Carry相加，得到Sum Total。

公开(公告)号：US06732126B1

公开(公告)日：2004-05-04

申请号：US09307072

申请日：1999-05-07

申请人： Hsinshih Wang

发明人： Hsinshih Wang

IPC分类号： G06F748

CPC分类号： G06F7/57

摘要： A programmable and configurable datapath unit (DPU) includes a configuration of single-bit multi-function processing units (PUs). The DPU can perform any of a variety of functions depending on the control applied to each PU. Functionality can be increased by utilizing multiplexers to direct data into, out of, and through each DPU dependent on the selected function being performed. Datapath units can also be configured and interconnected to form larger datapath circuits, arrays, and systems so as to increase the data throughput of the datapath system. A configurable and programmable datapath array includes rows of datapath units which can be interconnected to provide DPU circuits having varying input operand widths and functions. A datapath system can be constructed with a plurality of arrays of DPUs to further increase system data throughput.

摘要翻译： 可编程和可配置的数据路径单元（DPU）包括单位多功能处理单元（PU）的配置。 DPU可以根据应用于每个PU的控制执行各种功能中的任何一种。 可以通过利用多路复用器根据所执行的所选择的功能将数据引导到每个DPU之外，并通过每个DPU来提高功能。 数据路径单元也可以配置和互连，形成更大的数据路径电路，阵列和系统，从而增加数据通路系统的数据吞吐量。 可配置和可编程的数据路径阵列包括可以互连的数据路径单元行，以提供具有变化的输入操作数宽度和功能的DPU电路。 可以使用多个DPU阵列来构建数据路径系统，以进一步增加系统数据吞吐量。

公开(公告)号：US06675137B1

公开(公告)日：2004-01-06

申请号：US09491882

申请日：2000-01-26

申请人： Anthony John Toprac ,  Hongyu Yue

发明人： Anthony John Toprac ,  Hongyu Yue

IPC分类号： G06F748

CPC分类号： G01N21/71 ,  A61K39/00 ,  C07K14/195 ,  G01N21/73 ,  G05B2219/32187 ,  G05B2219/45031 ,  H01J37/32082 ,  H01J37/32935 ,  H01J37/32963 ,  H01J37/32972 ,  H01J37/3299 ,  H01J2237/334 ,  H01J2237/3341 ,  H01L21/67069 ,  H01L21/67253 ,  H01L22/20 ,  H01L22/26

摘要： A method is provided for compressing data. The method includes collecting data representative of a process. The method further includes scaling at least a portion of the collected data to generate mean values and mean-scaled values for the collected data. The method also includes calculating Scores from the mean-scaled values for the collected data using at most first, second, third and fourth Principal Components derived from a model using archived data sets and saving the Scores and the mean values.

摘要翻译： 提供了一种压缩数据的方法。 该方法包括收集代表过程的数据。 该方法还包括缩放所收集的数据的至少一部分以生成所收集的数据的平均值和平均缩放值。 该方法还包括从使用归档数据集的模型导出的最多第一，第二，第三和第四主要组件的收集数据的平均值计算分数，并保存分数和平均值。

公开(公告)号：US06463451B2

公开(公告)日：2002-10-08

申请号：US09902603

申请日：2001-07-12

申请人： Il Taek Lim ,  Kyu Seok Kim

发明人： Il Taek Lim ,  Kyu Seok Kim

IPC分类号： G06F748

CPC分类号： G06F7/57 ,  G06F7/49921 ,  G06F7/49947 ,  G06F17/142

摘要： A digital signal processor being capable of rapidly operating a number of complex arithmetic formulae as such FFT. The digital signal processor operates data from first input line and data from second input line by a multiplier; operating data from any one of the first and second input lines and data from the first operating means by means of second operating means; and operating the data from any one of the first and second input lines and the data from the first operating means by means of third operating means. The data output from the multiplier is operates with any one from the first and second input lines by first accumulator. Also, the data output from the multiplier is operates with any one from the first and second input lines by second accumulator.

摘要翻译： 数字信号处理器能够快速地操作多个这样的FFT的复杂算术公式。 数字信号处理器通过乘法器从第一输入行和第二输入行的数据操作数据; 通过第二操作装置从第一和第二输入线中的任何一个操作数据和来自第一操作装置的数据; 以及通过第三操作装置操作来自第一和第二输入线中的任何一个的数据和来自第一操作装置的数据。 从乘法器输出的数据通过第一个累加器从第一和第二输入线中的任何一个操作。 此外，乘法器输出的数据通过第二累加器从第一和第二输入线中的任何一个操作。