公开(公告)号：US5656538A

公开(公告)日：1997-08-12

申请号：US410782

申请日：1995-03-24

申请人： Nathan F. Gardner ,  Stephen A. Stockman ,  Quesnell J. Hartmann ,  Gregory E. Stillman

发明人： Nathan F. Gardner ,  Stephen A. Stockman ,  Quesnell J. Hartmann ,  Gregory E. Stillman

IPC分类号： H01L21/205 ,  H01L21/20

CPC分类号： H01L21/02392 ,  H01L21/02461 ,  H01L21/02543 ,  H01L21/02573 ,  H01L21/0262 ,  Y10S148/003 ,  Y10S148/064 ,  Y10S438/918

摘要： A process for growing semi-insulating layers of indium phosphide and other group III-V materials through the use of halide dopant or etchant introduction during growth. Gas phase epitaxial growth techniques are utilized at low temperatures to produce indium phosphide layers having a resistivity greater than approximately 10.sup.7 ohm-cm. According to the preferred embodiment carbon tetrachloride is used as a dopant at flow rates above 5 sccm to grow the layers with substrate growth temperatures ranging from approximately 460.degree. C. to 525.degree. C. This temperature range provides an advantage over the transition metal techniques for doping indium phosphide since the high temperatures generally required for those techniques limit the ability to control growth. Good surface morphology is also obtained through the growth according to the present invention. The process may be used to form many types of group III-V semiconductor devices.

摘要翻译： 在生长期间通过使用卤素掺杂剂或蚀刻剂引入生长磷化铟和其它III-V族材料的半绝缘层的方法。 在低温下使用气相外延生长技术产生电阻率大于约107欧姆 - 厘米的磷化铟层。 根据优选的实施方案，四氯化碳以5sccm以上的流速用作掺杂剂，以生长基底生长温度为约460℃至525℃的层。该温度范围优于过渡金属技术 掺杂磷化铟，因为这些技术通常需要的高温限制了控制生长的能力。 通过根据本发明的生长也可获得良好的表面形态。 该方法可用于形成许多类型的III-V族III族半导体器件。

公开(公告)号：US5547897A

公开(公告)日：1996-08-20

申请号：US259944

申请日：1994-06-15

申请人： Nikhil R. Taskar ,  Dennis Gallagher ,  Donald R. Dorman

发明人： Nikhil R. Taskar ,  Dennis Gallagher ,  Donald R. Dorman

IPC分类号： C30B29/48 ,  C23C16/18 ,  C30B25/02 ,  C30B25/10 ,  H01L21/205 ,  H01L21/365 ,  H01L21/22

CPC分类号： C30B25/02 ,  C30B25/105 ,  C30B29/48 ,  H01L21/02395 ,  H01L21/0256 ,  H01L21/02579 ,  H01L21/0262 ,  Y10S148/064

摘要： The concentration of N acceptors in an as-grown epitaxial layer of a II-VI semiconductor compound is enhanced by the use of tertiary butyl amine as the dopant carrier, and is further enhanced by the use of photo-assisted growth using illumination whose wavelength is within the range of 200-250 nm.

摘要翻译： 通过使用叔丁胺作为掺杂剂载体，II-VI半导体化合物的生长外延层中的N受体的浓度增强，并且通过使用光辅助生长进一步增强，其使用波长为 在200-250nm的范围内。

公开(公告)号：US5416030A

公开(公告)日：1995-05-16

申请号：US136501

申请日：1993-10-14

申请人： Jerome L. Elkind ,  Lissa K. Magel

发明人： Jerome L. Elkind ,  Lissa K. Magel

IPC分类号： H01L31/103 ,  H01L31/18

CPC分类号： H01L31/1832 ,  H01L31/1032 ,  Y10S148/064 ,  Y10S148/135 ,  Y10S438/971

摘要： A method is provided for reducing leakage current in an integrated circuit (24). A first doped region (18) having a first conductivity type is formed in a semiconductor layer (10) having a second conductivity type, such that a second doped region (20) having the first conductivity type is formed in the semiconductor layer (10). The second doped region (20) is less conductive than the first doped region (18). The first doped region (18) is removed from the semiconductor layer (10), such that the second doped region (20) substantially remains in the semiconductor layer (10). The integrated circuit (24) is formed to include the second doped region (20) and the semiconductor layer (10).

摘要翻译： 提供一种用于减少集成电路（24）中的漏电流的方法。 具有第一导电类型的第一掺杂区域（18）形成在具有第二导电类型的半导体层（10）中，使得在半导体层（10）中形成具有第一导电类型的第二掺杂区域（20） 。 第二掺杂区域（20）的导电性比第一掺杂区域（18）低。 从半导体层（10）去除第一掺杂区域（18），使得第二掺杂区域（20）基本上保留在半导体层（10）中。 集成电路（24）形成为包括第二掺杂区域（20）和半导体层（10）。

公开(公告)号：US5411915A

公开(公告)日：1995-05-02

申请号：US134293

申请日：1993-10-08

申请人： Hiroki Hamada ,  Shoji Honda ,  Masayuki Shono ,  Takao Yamaguchi

发明人： Hiroki Hamada ,  Shoji Honda ,  Masayuki Shono ,  Takao Yamaguchi

IPC分类号： H01S5/22 ,  H01S5/32 ,  H01S5/323 ,  H01S5/343 ,  H01L21/20

CPC分类号： B82Y20/00 ,  H01S5/32 ,  H01S5/32325 ,  H01S2304/04 ,  H01S5/22 ,  H01S5/3202 ,  H01S5/34326 ,  Y10S148/064 ,  Y10S148/11 ,  Y10S438/973

摘要： A semiconductor laser device of an AlGaInP system includes a GaAs substrate and a surface of the substrate is inclined by 5.degree. or more from a {100} plane in a direction.

摘要翻译： AlGaInP系统的半导体激光器件包括GaAs衬底，并且衬底的表面在<011>方向上从{100}面倾斜5°或更多。

公开(公告)号：US5306660A

公开(公告)日：1994-04-26

申请号：US657692

申请日：1991-02-19

申请人： Charles R. Younger ,  Shawn L. Johnston ,  Stuart J. C. Irvine ,  Edward R. Gertner ,  Kenneth L. Hess

发明人： Charles R. Younger ,  Shawn L. Johnston ,  Stuart J. C. Irvine ,  Edward R. Gertner ,  Kenneth L. Hess

IPC分类号： C23C16/30 ,  C23C16/448 ,  C30B25/02 ,  H01L21/365

CPC分类号： C23C16/448 ,  C23C16/306 ,  C30B25/02 ,  C30B29/48 ,  Y10S148/064 ,  Y10S438/933

摘要： Method and apparatus for vapor phase free methyl radical transport of indium dopant species for precise predetermined reproducible doping concentrations to control electrical properties for MOCVD grown materials.

摘要翻译： 用于精确预定可重复掺杂浓度的铟掺杂剂物质的无气相甲基自由基转移的方法和装置，以控制MOCVD生长材料的电性能。

公开(公告)号：US5290394A

公开(公告)日：1994-03-01

申请号：US947172

申请日：1992-09-18

申请人： Tokuhito Sasaki

发明人： Tokuhito Sasaki

IPC分类号： C23C14/06 ,  C23C14/02 ,  C23C14/32 ,  C30B23/02 ,  C30B23/08 ,  H01L21/36 ,  H01L31/0264 ,  H01L35/00 ,  H01L21/203 ,  H01L21/20

CPC分类号： C30B23/02 ,  C30B23/002 ,  C30B29/48 ,  H01L21/02395 ,  H01L21/02433 ,  H01L21/0248 ,  H01L21/02562 ,  H01L21/02617 ,  Y10S117/902 ,  Y10S148/064

摘要： In a method of manufacturing a Hg.sub.1-x Cd.sub.x Te (x=0 to 1) infrared detector using GaAs as a substrate, there is provided a method of depositing a HgCdTe film that has high crystalline quality. By changing the substrate temperature, it is possible to control the plane orientation of a CdTe buffer layer formed on a GaAs (211)B substrate. When the substrate temperature is high, the buffer layer is formed with plane orientation (133) and when the substrate temperature is low, the buffer layer is formed with plane orientation (211). In the former, it is possible to form a film having high crystalline quality as compared with that of a film in the latter.

摘要翻译： 在使用GaAs作为衬底的制造Hg1-xCdxTe（x = 0〜1）红外检测器的方法中，提供了沉积具有高结晶质量的HgCdTe膜的方法。 通过改变衬底温度，可以控制形成在GaAs（211）B衬底上的CdTe缓冲层的平面取向。 当衬底温度高时，缓冲层形成为平面取向（133），并且当衬底温度低时，缓冲层形成有平面取向（211）。 在前者中，可以形成与后者中的膜相比具有高结晶质量的膜。

公开(公告)号：US5262349A

公开(公告)日：1993-11-16

申请号：US931368

申请日：1992-08-18

申请人： Yasuaki Yoshida

发明人： Yasuaki Yoshida

IPC分类号： H01L21/36 ,  H01L21/385 ,  H01L21/477 ,  H01L27/14 ,  H01L31/10 ,  H01L21/324

CPC分类号： H01L21/477 ,  Y10S148/064

摘要： In a method for producing a II-VI compound semiconductor device including mercury, a thin film of a group II element or a group II element compound, which is a solid at room temperature, is deposited on a surface of a p type II-VI compound semiconductor. Annealing is carried out to diffuse the group II element from the thin film into the p type II-VI compound semiconductor whereby a region of the p type II-VI compound semiconductor on which the thin film is present is converted to n type, resulting in a p-n junction. Therefore, instruments and materials are easily handled, increasing work efficiency and productivity. In addition, the annealing is carried out without a complicated temperature profile, resulting in a simple process.

摘要翻译： 在含有汞的II-VI族化合物半导体装置的制造方法中，在室温下作为固体的II族元素或II族元素化合物的薄膜沉积在ap型II-VI化合物 半导体。 进行退火以将II族元素从薄膜扩散到p型II-VI族化合物半导体中，由此将存在薄膜的p型II-VI化合物半导体的区域转变为n型，导致 一个pn结。 因此，仪器和材料易于处理，提高工作效率和生产率。 此外，退火在没有复杂的温度曲线的情况下进行，导致简单的工艺。

公开(公告)号：US4946735A

公开(公告)日：1990-08-07

申请号：US284821

申请日：1988-12-14

申请人： Kevin C. Lee ,  Charles A. Lee ,  John Silcox

发明人： Kevin C. Lee ,  Charles A. Lee ,  John Silcox

IPC分类号： H01L21/3063 ,  H01L21/324 ,  H01L21/465 ,  H01L21/477

CPC分类号： H01L21/3063 ,  H01L21/30635 ,  H01L21/324 ,  H01L21/3245 ,  H01L21/465 ,  H01L21/477 ,  Y10S148/003 ,  Y10S148/005 ,  Y10S148/042 ,  Y10S148/056 ,  Y10S148/058 ,  Y10S148/064 ,  Y10S148/065 ,  Y10S148/083 ,  Y10S148/119 ,  Y10S148/135 ,  Y10S148/90 ,  Y10S438/924 ,  Y10S438/977 ,  Y10T428/261 ,  Y10T428/266 ,  Y10T428/31 ,  Y10T428/315

摘要： This invention relates to ultra-thin semiconductor films which can be in the submicron range formed from semiconductor materials such as silicon, germanium and gallium aresenide. The films are formed by creating a thin slightly damaged surface on the polished reverse side of a film (e.g., a wafer) of the semiconductor by low dose ion implantation and then etching the semiconductor material on the front side of the film to remove the semiconductor material down to the ion implanted damaged layer. While the implanted ions can be chosen from functionally desirable ions which upon annealing remain in the film to alter the original electrical characteristics, the implanted ions can also be chosen so that upon annealing, the resultant ultra-thin semiconductor film has the same electrical characteristics as the original semiconductor material.The ion implantation changes the etching characteristics of the ion implanted layer. Thus, when the partially damaged semiconductor material is exposed to an etchant the etching rate in the damaged region is decreased by a factor of several thousand as compared to the undamagGOVERNMENT FUNDINGThe invention described and claimed herein was at least in part supported by the National Submicron Facility under NSF Grant #ECS-8200312 to the NRRFSS.

摘要翻译： 本发明涉及可以由半导体材料如硅，锗和砷化镓形成的亚微米范围的超薄半导体膜。 通过低剂量离子注入在半导体的膜（例如，晶片）的抛光反面上形成薄的稍微损伤的表面，然后蚀刻膜前侧的半导体材料以除去半导体， 材料下降到离子植入损伤层。 虽然注入的离子可以从功能上需要的离子中选择，当退火保留在膜中以改变原始电特性时，也可以选择注入的离子，使得在退火时，所得的超薄半导体膜具有与 原来的半导体材料。 离子注入改变离子注入层的蚀刻特性。 因此，当部分损坏的半导体材料暴露于蚀刻剂时，与未损坏的半导体材料相比，损伤区域中的蚀刻速率降低了几千倍。

公开(公告)号：US4792832A

公开(公告)日：1988-12-20

申请号：US43046

申请日：1987-04-24

申请人： Toshio Baba ,  Takashi Mizutani ,  Masaki Ogawa

发明人： Toshio Baba ,  Takashi Mizutani ,  Masaki Ogawa

IPC分类号： H01L21/314 ,  H01L29/08 ,  H01L29/15 ,  H01L29/737 ,  H01L29/778 ,  H01L31/0352 ,  H01L33/06 ,  H01S5/32 ,  H01S5/34 ,  H01S5/343 ,  H01S5/347 ,  H01L29/267 ,  H01L29/205 ,  H01L29/207

CPC分类号： H01L33/06 ,  B82Y20/00 ,  H01L21/314 ,  H01L29/0843 ,  H01L29/0891 ,  H01L29/152 ,  H01L29/155 ,  H01L29/7376 ,  H01L29/7781 ,  H01L29/7787 ,  H01L31/035236 ,  H01L31/035254 ,  H01S5/32 ,  H01S5/34 ,  H01S5/343 ,  H01S5/3432 ,  H01S5/347 ,  Y10S148/064 ,  Y10S148/065 ,  Y10S148/072 ,  Y10S148/16

摘要： The superlattice type semiconductor material has a multilayered structure of first layers of semiconductor containing impurities and having a thickness thinner than electron or hole wavelength and second layers of semiconductor free from impurities or insulator having such a thickness that electrons or holes may penetrate by tunneling effect, the first and second layers being alternately piled. Electrons or holes distribute uniformly over the entire of the multilayered structure to show a property of uniform semiconductor material.

公开(公告)号：US4154631A

公开(公告)日：1979-05-15

申请号：US801431

申请日：1977-05-27

申请人： Richard B. Schoolar

发明人： Richard B. Schoolar

IPC分类号： C30B23/02 ,  C30B29/46 ,  H01L21/203 ,  H01L21/331 ,  H01L21/365 ,  H01L29/73 ,  H01L31/10 ,  H01L21/363

CPC分类号： C30B23/02 ,  C30B29/48 ,  Y10S148/006 ,  Y10S148/063 ,  Y10S148/064 ,  Y10S148/169 ,  Y10S438/967

摘要： A high temperature method for the preparation of single and multiple epitaxial layers of single-phase lead sulfide-selenide, [Pb].sub.a [S.sub.x Se.sub.1-x ].sub.1-a wherein x varies between one and zero, inclusive, and a=0.500.+-.0.003, deposited upon substrates of barium fluoride, BaF.sub.2, maintained in near thermodynamic equilibrium with concurrently sublimated lead alloy and chalcogenide sources. During preparation, the substrate is exposed to the vapor emanating from the single chimney of a two-zone, dual-chamber furnace, thereby providing an epilayer of uniform, and predetermined electrical and optical properties.

摘要翻译： 用于制备单相硫化铅/硒化物[Pb] a [SxSe1-x] 1-a的单个和多个外延层的高温方法，其中x在1和0之间变化，包括1和0，a = 0.500 + -0.003，沉积在与同时升华的铅合金和硫族化合物源保持接近热力学平衡的氟化钡BaF2的基底上。 在制备过程中，将基板暴露于由双区双腔炉的单个烟囱发出的蒸气中，从而提供均匀且预定的电气和光学特性的外延层。