Device with reconfigurable continuous and discrete time functionality
    1.
    发明授权
    Device with reconfigurable continuous and discrete time functionality 有权
    具有可重构连续和离散时间功能的设备

    公开(公告)号:US08111097B1

    公开(公告)日:2012-02-07

    申请号:US12762207

    申请日:2010-04-16

    CPC classification number: H03K25/04

    Abstract: A programmable system includes a programmable analog device including an operational amplifier to generate an output voltage based on input voltages at terminals of the operational amplifier. The programmable system also includes a system controller to direct the programmable analog device to reconfigure analog circuitry providing the input voltages to the operational amplifier. The reconfiguration of the analog circuitry allows the programmable analog device to implement discrete-time or continuous-time functions.

    Abstract translation: 可编程系统包括可编程模拟装置,其包括运算放大器,以基于运算放大器端子处的输入电压产生输出电压。 可编程系统还包括系统控制器,用于引导可编程模拟装置重新配置向运算放大器提供输入电压的模拟电路。 模拟电路的重新配置允许可编程模拟设备实现离散时间或连续时间功能。

    Multistate device for electronic counting
    2.
    发明授权
    Multistate device for electronic counting 失效
    用于电子计数的多功能设备

    公开(公告)号:US5033069A

    公开(公告)日:1991-07-16

    申请号:US390792

    申请日:1989-08-08

    CPC classification number: B82Y10/00 H03K25/04 H03K29/00

    Abstract: The disclosure is directed to an electronic circuit and method for counting input electrical signals. An embodiment of the method of the invention includes the following steps: providing a device having a current versus voltage characteristic with a plurality of peaks, and negative resistance regions between the peaks; generating a triggering pulse in response to each input signal to be counted, and applying said triggering pulse to the device to change the voltage across the device; and outputting the voltage across the device as an indication of the number of received input signals. The device may be a resonant tunneling diode with multiple peaks in its current versus voltage characteristic. The preferred embodiment of the method of the invention includes the step of providing a load resistance means across the device. In this embodiment, the triggering pulse is operative to change the voltage across the device to a stable operating point of the device in conjunction with the load resistance means. Also in this embodiment, the step of providing a triggering pulse comprises providing a current pulse whose magnitude depends on the present stable operating point of the device in conjunction with the load resistance means. The counting technique and apparatus of the present invention operates at high speed and without undue complexity.

    Abstract translation: 本公开涉及用于对输入电信号进行计数的电子电路和方法。 本发明方法的一个实施例包括以下步骤:提供具有多个峰值的电流对电压特性的装置和峰值之间的负电阻区域; 响应于要被计数的每个输入信号产生触发脉冲,以及将所述触发脉冲施加到所述装置以改变所述装置两端的电压; 并且输出跨设备的电压作为接收到的输入信号的数量的指示。 该器件可以是在其电流对电压特性中具有多个峰值的谐振隧道二极管。 本发明方法的优选实施例包括在整个装置上提供负载电阻装置的步骤。 在该实施例中,触发脉冲可操作以结合负载电阻装置将装置两端的电压改变到装置的稳定工作点。 同样在该实施例中,提供触发脉冲的步骤包括提供电流脉冲,其大小取决于装置的当前稳定工作点以及负载电阻装置。 本发明的计数技术和装置高速运转,没有过多的复杂性。

    Device and method for counting flanks of electrical pulses
    3.
    发明授权
    Device and method for counting flanks of electrical pulses 失效
    用于计算电脉冲侧面的装置和方法

    公开(公告)号:US5978194A

    公开(公告)日:1999-11-02

    申请号:US905076

    申请日:1997-08-01

    CPC classification number: H03K25/04

    Abstract: A device for counting the edges of electric pulses is disclosed and comprises a first capacitor connected in series with a pump circuit, which comprises a first resistance in series with a first diode connected in parallel with a second resistance, and a second capacitor connected in parallel with the first resistance. When a voltage, which is caused by one of the edges of an electric pulse, is applied across the first capacitor and the pump circuit, the first and second capacitors are charged in series with a charge that is essentially determined by the second capacitor. A first input of a comparator is connected to the connection point between the first capacitor and the pump circuit and a second input of the comparator is connected to a comparison potential, in order to indicate that a given approximate number of pulses have been counted when the voltage across the first capacitor exceeds a threshold level determined by the comparison potential.

    Abstract translation: 公开了一种用于对电脉冲的边缘进行计数的装置,并且包括与泵电路串联连接的第一电容器,其包括与与第二电阻并联连接的第一二极管串联的第一电阻和并联连接的第二电容器 与第一个阻力。 当由电脉冲的一个边缘引起的电压施加在第一电容器和泵电路两端时,第一和第二电容器与基本上由第二电容器确定的电荷串联充电。 比较器的第一输入端连接到第一电容器和泵电路之间的连接点,并且比较器的第二输入端连接到比较电位,以便指示当给定的近似数量的脉冲被计数时 第一电容器两端的电压超过由比较电位确定的阈值电平。

    Reconfigurable dynamic logic gate with linear core
    6.
    发明授权
    Reconfigurable dynamic logic gate with linear core 有权
    具有线性核的可重构动态逻辑门

    公开(公告)号:US08587343B2

    公开(公告)日:2013-11-19

    申请号:US13483146

    申请日:2012-05-30

    CPC classification number: H03K19/1733 H03K25/04

    Abstract: A dynamically reconfigurable linear core logic gate is a device that allows logical outputs dependent upon configurable parameters set within device. The device is comprised of three blocks: The first block receives at least one input signal and determines whether the signal or signals are low or high in comparison with a threshold reference signal. The second block sums the logic signals of the first block with an offset signal. The third block determines if the sum realized in the second block is a low or high by checking whether the sum falls within a predetermined interval.

    Abstract translation: 动态可重构的线性核心逻辑门是允许逻辑输出取决于设备内设置的可配置参数的设备。 该装置由三个块组成:第一块接收至少一个输入信号,并且与阈值参考信号相比确定信号或信号是低还是高。 第二块通过偏移信号求和第一块的逻辑信号。 第三块通过检查和是否落在预定间隔内,确定在第二块中实现的和是否为低或高。

    Device with reconfigurable continuous and discrete time functionality
    9.
    发明授权
    Device with reconfigurable continuous and discrete time functionality 有权
    具有可重构连续和离散时间功能的设备

    公开(公告)号:US08299850B1

    公开(公告)日:2012-10-30

    申请号:US13367690

    申请日:2012-02-07

    CPC classification number: H03K25/04

    Abstract: A programmable device includes an operational amplifier and circuitry. The operational amplifier is configured to generate an output voltage based on input voltages at input terminals thereof. The circuitry is configured to provide the input voltages to the operational amplifier. The configuration of the circuitry allows the programmable device to implement discrete-time or continuous-time functions. The circuitry includes a resistor network and a capacitor network configured to be selectively coupled to the operational amplifier.

    Abstract translation: 可编程器件包括运算放大器和电路。 运算放大器被配置为基于其输入端子处的输入电压产生输出电压。 电路被配置为向运算放大器提供输入电压。 电路的配置允许可编程器件实现离散时间或连续时间功能。 该电路包括电阻器网络和被配置为选择性地耦合到运算放大器的电容器网络。

    Frequency converter delivering constant width output pulses within
variable duty cycles
    10.
    发明授权
    Frequency converter delivering constant width output pulses within variable duty cycles 失效
    变频器在可变占空比范围内提供恒定宽度的输出脉冲

    公开(公告)号:US4200812A

    公开(公告)日:1980-04-29

    申请号:US868863

    申请日:1978-01-12

    Inventor: Manfred Fichter

    CPC classification number: H03K25/04

    Abstract: In the disclosed frequency converter, a pulse shaper receives pulses at the input frequency and changes their pulse widths to a predetermined value. An integrator integrates the reshaped pulses. An ultra high resistance triggering stage applies the voltage output of the integrator to a monostable multivibrator which is fired each time the voltage output of the integrator exceeds a predetermined value. The multivibrator forms pulses which turn on a discharge circuit that rapidly resets the integrator with each multivibrator output pulse. The multivibrator output pulses appear at the attenuated frequency which is established by, and can be infinitely varied by, stepless change of the predetermined pulse widths.

    Abstract translation: 在所公开的变频器中,脉冲整形器以输入频率接收脉冲并将其脉冲宽度改变为预定值。 积分器整合重构脉冲。 超高电阻触发级将积分器的电压输出应用于单稳态多谐振荡器,该单稳态多谐振荡器每当积分器的电压输出超过预定值时被触发。 多谐振荡器形成脉冲,其接通放电电路,以使用每个多谐振荡器输出脉冲快速复位积分器。 多谐振荡器输出脉冲以衰减频率出现,该衰减频率由预定脉冲宽度的无级变化建立并且可无限变化。

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