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公开(公告)号：US12086294B2
公开(公告)日：2024-09-10
申请号：US17490178
申请日：2021-09-30
发明人： Jiang Yang , Jianfeng Xue
CPC分类号： G06F21/755 , G06F21/554 , G06F21/85 , H03K17/22 , G01R19/0084
摘要： A voltage attack detection circuit includes: at least one voltage regulation circuit, where the at least one voltage regulation circuit is connected to an external supply respectively, the at least one voltage regulation circuit is configured to convert the external supply to at least one internal supply, and the at least one internal supply is configured to output at least one first voltage respectively; at least one voltage sensor, where the at least one voltage sensor is connected to the at least one internal supply respectively, so as to receive the at least one first voltage respectively, each voltage sensor of the at least one voltage sensor is configured to output a reference voltage based on a received reference voltage and a received first voltage, the reference voltage is configured to indicate whether a received first voltage is within a present voltage range.
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公开(公告)号：US12063036B2
公开(公告)日：2024-08-13
申请号：US18154335
申请日：2023-01-13
申请人： NXP USA, Inc.
IPC分类号： H03K19/01 , G05F1/46 , H03K3/037 , H03K19/0185 , H03K17/22
CPC分类号： H03K19/018507 , G05F1/46 , H03K3/037 , H03K17/22
摘要： One example discloses a power application circuit, including: a first power application circuit, configured to receive an enable signal and a first voltage; wherein the first power application circuit is configured to output the first voltage at a first current after a first delay from when the enable signal is received; and a second power application circuit, configured to receive the enable signal and a second voltage; wherein the second power application circuit is configured to output the second voltage at a second current after a second delay from when the enable signal is received.
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公开(公告)号：US20240134406A1
公开(公告)日：2024-04-25
申请号：US18379262
申请日：2023-10-11
发明人： Julien GOULIER , Nicolas GOUX , Marc JOISSON
CPC分类号： G05F3/262 , G05F1/468 , H03K17/18 , H03K17/22 , H03F3/45179
摘要： An electronic circuit includes a reference voltage circuit and a circuit for checking the starting operation of the reference voltage circuit. The reference voltage circuit includes a first stack of a first transistor and second transistor receiving first and second control signals, respectively. The start check circuit includes a first elementary test circuit including a second stack of a third transistor and fourth transistor receiving the first and second control signals, respectively. An output of the first elementary test circuit delivers a first binary signal indicative of proper starting operation of the reference voltage circuit.
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公开(公告)号：US11703925B2
公开(公告)日：2023-07-18
申请号：US17614904
申请日：2020-05-26
发明人： Yongchao Wang , Yiming Qi , Lingjun Liu
摘要： An outdoor device reset system includes a voltage regulation apparatus coupled to a power supply apparatus and an outdoor device coupled to the voltage regulation apparatus. The voltage regulation apparatus is configured to regulate a working voltage input to the outdoor device based on a feedback signal, a supply voltage from the power supply apparatus for the voltage regulation apparatus, and a reference voltage of the voltage regulation apparatus. The outdoor device is configured to determine a change amount of the working voltage, and perform a reset operation when the change amount is within a preset range.
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公开(公告)号：US11646731B2
公开(公告)日：2023-05-09
申请号：US17560671
申请日：2021-12-23
发明人： Issei Kashima , Atsushi Tsuda
IPC分类号： H03K17/22 , H03K5/24 , H03K17/60 , H03K17/687
CPC分类号： H03K17/22 , H03K5/24 , H03K17/60 , H03K17/687
摘要： To provide a technique for detecting a low voltage of a power-on reset circuit. A semiconductor device has a power-on reset circuit including: a first bipolar transistor; a second bipolar transistor formed by connecting a plurality of bipolar transistors in parallel; a detection-voltage adjusting resistance element; a temperature-characteristic adjusting resistance element; a current adjusting resistance element; and a comparator.
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公开(公告)号：US20190068185A1
公开(公告)日：2019-02-28
申请号：US16025468
申请日：2018-07-02
发明人： John Joseph Costello
IPC分类号： H03K17/22
CPC分类号： H03K17/223 , H03K17/22
摘要： An electrical reset circuit is configured to generate a reset pulse to reset one or more electrical components. The electrical reset circuit includes a first device electrically connected between a power supply input and a first node. The first device is configured to conduct current after the power supply input reaches a first voltage threshold. The electrical reset circuit also includes a second device electrically connected between the power supply input and a second node, where the second device is configured to conduct current after the power supply input reaches a second voltage threshold. In some examples, the electrical circuit includes a delay circuit configured to delay the reset pulse. Corresponding methods to providing a reset pulse are also contemplated.
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公开(公告)号：US20180191343A1
公开(公告)日：2018-07-05
申请号：US15393513
申请日：2016-12-29
IPC分类号： H03K17/22 , H03K17/30 , G05B19/042
CPC分类号： H03K17/22 , G05B19/042 , G05B2219/21119 , G06F1/24 , G06F1/3296 , H03K17/30
摘要： The optimal operating voltage of a complex SoC may be influenced by process variations. The operating voltages may be dynamically adjusted for optimal performance. These adjustments require a dynamic reconfiguration of the voltage monitoring thresholds in the power on reset circuitry of the SoC.
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公开(公告)号：US09990017B2
公开(公告)日：2018-06-05
申请号：US15041411
申请日：2016-02-11
发明人： Takashi Kawaguchi , Shinji Nakamiya
摘要： An electronic device that has a secondary battery and a controller which receives power supply from the secondary battery so as to perform a drive control on one or other multiple circuits driven by receiving the power supply from the secondary battery includes an initializing unit that starts processing for outputting an initializing signal to instruct the controller to perform initializing at predetermined timing, in response to a starting point in which a voltage of the secondary battery becomes equal to or lower than a first threshold voltage which is set to be higher than an operation-guaranteed voltage of the controller and a lower state thereof continues for a predetermined period of time.
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公开(公告)号：US20180107257A1
公开(公告)日：2018-04-19
申请号：US15787132
申请日：2017-10-18
申请人： ROHM CO., LTD.
发明人： Hirotsugu EGO
摘要： A power-on reset circuit is provided to a semiconductor device including a first power supply pin and N (N≥1) second power supply pins. A voltage monitoring circuit is configured with a voltage at the first power supply pin as its power supply, and compares each of the voltages supplied to the N second power supply pins with a corresponding threshold value. When the supplied voltage exceeds the corresponding threshold value for all the second power supply pins, the voltage monitoring circuit asserts a trigger signal TRIG. A reset signal generating circuit is configured with the voltage at the first power supply pin as its power supply. The reset signal generating circuit asserts a reset signal POR_OUT in response to assertion of the trigger signal TRIG.
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公开(公告)号：US09838003B1
公开(公告)日：2017-12-05
申请号：US15210672
申请日：2016-07-14
发明人： Sudheer Prasad
IPC分类号： H01H37/76 , H01H85/00 , H03K17/22 , H01L23/525 , H03K5/08
CPC分类号： H03K17/22 , G05F1/468 , H01L23/5256 , H02H9/001 , H02M1/36 , H02M2001/0045 , H03K5/08 , H03K17/223
摘要： A detection circuit includes a first transistor coupled to a gate of a high power transistor, a second transistor whose source is coupled to a drain of the first transistor, a first voltage divider coupled to a source of the first transistor, and a second voltage divider coupled to the source of the second transistor. The first transistor is configured to generate a first transistor output voltage representative of a gate voltage of the high power transistor shifted based on a first gate-to-source voltage of the first transistor. The second transistor is configured to generate a second gate-to-source voltage substantially equal to the first gate-to-source voltage. The first divider is configured to divide the first transistor output voltage by a first factor. The second divider is configured to divide the second gate-to-source voltage by a second factor correlated with the first factor.
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