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    Receiving circuit
    4.
    发明申请
    Receiving circuit 有权
    接收电路

    公开(公告)号：US20110169565A1

    公开(公告)日：2011-07-14

    申请号：US12929290

    申请日：2011-01-12

    Applicant: Wataru Nakamura

    Inventor： Wataru Nakamura

    IPC: H03F3/45

    CPC classification number: H03F3/45475 ,  H03F1/0266 ,  H03F3/45959 ,  H03F2200/27 ,  H03F2200/282 ,  H03F2200/294 ,  H03F2200/451 ,  H03F2200/471 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45434 ,  H03F2203/45541 ,  H03F2203/45578 ,  H03F2203/45581 ,  H03F2203/45588 ,  H03F2203/45594 ,  H03F2203/45596

    Abstract: A receiving circuit in accordance with an exemplary aspect of the present invention includes a first voltage-dividing circuit that outputs a first input signal obtained by voltage division of one of differential signals based on the resistance ratio between first and second resistors, a second voltage-dividing circuit that outputs a second input signal obtained by voltage division of the other of the differential signals based on the resistance ratio between third and fourth resistors, a differential amplifier that amplifies the differential component between the first and second input signals, a common-mode voltage detection circuit that detects the common-mode voltage of the differential signals, and a bias voltage switching circuit that switches the voltage value of a bias voltage based on the common-mode voltage.

    Abstract translation: 根据本发明的示例性方面的接收电路包括：第一分压电路，其输出基于第一和第二电阻器之间的电阻比的差分信号中的一个分压获得的第一输​​入信号;第二电压 - 分压电路，输出基于第三和第四电阻器之间的电阻比对另一个差分信号进行分压而获得的第二输入信号;放大第一和第二输入信号之间的差分分量的差分放大器;共模 电压检测电路，其检测所述差分信号的共模电压;以及偏置电压切换电路，其基于所述共模电压来切换偏置电压的电压值。

    Single ended preamplifier having multiple first stage banks for improved noise characteristics
    5.
    发明授权
    Single ended preamplifier having multiple first stage banks for improved noise characteristics 有权
    单端前置放大器具有多个第一级组，用于改善噪声特性

    公开(公告)号：US06538832B1

    公开(公告)日：2003-03-25

    申请号：US09589429

    申请日：2000-06-07

    Applicant: Indumini W. Ranmuthu ,  Hong Jiang

    Inventor： Indumini W. Ranmuthu ,  Hong Jiang

    IPC: G11B509

    CPC classification number: H03F3/45991 ,  G11B5/012 ,  G11B5/09 ,  G11B2005/0016 ,  H03F3/45959

    Abstract: In hard disk drives (HDD), a magnetic read head moves over a portion of the hard disk when reading data. A preamplifier, having an initial amplification stage of the single ended type, connects to the magnetic read head and amplifies a data signal picked up by the magnetic read head. The preamplifier typically has multiple read heads, or channels. In order to reduce noise coming into the read channels of the preamplifier from the substrate capacitances of the input transistors connected to the read heads, the input transistors are grouped together into multiple banks that are multiplexed, or turn on separately. To further aid noise reduction, the poles of the single ended amplifier are matched, that is, the frequency response of the constant voltage side is matched to the frequency response to the signal side. This effectively reduces both ground noise and Vcc power supply noise as the the noise becomes common mode on the inputs to a differential amplifier that is connected to the single ended amplifier. Noise is further minimized by connecting the substrates of the switching transistors connected to the input transistors to magnetic read ground, as opposed to integrated circuit ground.

    Abstract translation: 在硬盘驱动器（HDD）中，当读取数据时磁读取头在硬盘的一部分上移动。 具有单端类型的初始放大级的前置放大器连接到磁读头并放大由磁读头读取的数据信号。 前置放大器通常具有多个读取头或通道。 为了减少从连接到读取头的输入晶体管的基板电容进入前置放大器的读取通道的噪声，输入晶体管被分组在多个组中，或分开开启。 为了进一步减少噪声，单端放大器的极点匹配，即恒压侧的频率响应与对信号侧的频率响应相匹配。 由于噪声成为连接到单端放大器的差分放大器的输入上的共模，因此这有效地降低了接地噪声和Vcc电源噪声。 与集成电路接地相反，将连接到输入晶体管的开关晶体管的基板连接到磁性读取地，进一步减小噪声。

    Differential amplifier
    7.
    发明授权
    Differential amplifier 失效
    差分放大器

    公开(公告)号：US4879521A

    公开(公告)日：1989-11-07

    申请号：US299909

    申请日：1989-01-23

    Applicant: Michael V. Bredemann ,  Forest S. Seitz

    Inventor： Michael V. Bredemann ,  Forest S. Seitz

    IPC: H03F3/347 ,  H03F3/45

    CPC classification number: H03F3/45475 ,  H03F3/347 ,  H03F3/45479 ,  H03F3/45959

    Abstract: A circuit for a differential amplifier having common mode rejection means. The common mode voltage is applied to an inverting amplifier to derive a common mode signal in opposition to the applied common mode voltage. A portion of the applied common mode voltage is combined with the opposing common mode voltage in a ratio such that the resultant common mode signal has a null value. A voltage divider network coupled to the input of the amplifier provides an output corresponding to a differential signal and substantially independent of the common mode signal. Buffer amplifiers provide substantial isolation from stray capacitances and loading by the resistor elements, thereby enhancing the bandwidth of the circuit.

    Abstract translation: 一种具有共模抑制装置的差分放大器的电路。 共模电压被施加到反相放大器以导出与施加的共模电压相反的共模信号。 施加的共模电压的一部分与相对的共模电压组合，使得所得到的共模信号具有空值。 耦合到放大器的输入的分压器网络提供对应于差分信号的输出并且基本上与共模信号无关。 缓冲放大器提供与杂散电容和电阻元件负载的实质隔离，从而增强电路的带宽。

    Low-voltage Differential signal receiver circuitry
    9.
    发明申请
    Low-voltage Differential signal receiver circuitry 有权
    低压差分信号接收电路

    公开(公告)号：US20150077166A1

    公开(公告)日：2015-03-19

    申请号：US14479795

    申请日：2014-09-08

    Applicant: STMICROELECTRONICS (GRENOBLE 2) SAS

    Inventor： Thierry Masson ,  Sandrine Nicolas ,  Colette Morche

    IPC: H02M3/06 ,  G05F5/00

    CPC classification number: H02M3/06 ,  G05F5/00 ,  H03F3/45959 ,  H04L25/0292

    Abstract: A receiver circuit for a differential input signal, may include a divider bridge having first and second ends, a midpoint therebetween, and intermediate points on either side of the midpoint. The divider bridge is coupled to receive the differential input signal at the first and second ends. A current generator is coupled to the divider bridge and configured to generate compensation currents associated respectively with components of the differential input signal. The divider bridge is configured to receive the compensation currents respectively at the intermediate points, and generate a compensated differential signal between the intermediate points.

    Abstract translation: 用于差分输入信号的接收器电路可以包括具有第一端和第二端，其中间点和中点两侧的中间点的分隔桥。 分压器桥耦合以在第一端和第二端接收差分输入信号。 电流发生器耦合到分压器桥并且被配置为产生分别与差分输入信号的分量相关联的补偿电流。 分压器桥被配置为分别在中间点处接收补偿电流，并在中间点之间产生经补偿的差分信号。

    Microphone Preamplifier Circuit
    10.
    发明申请
    Microphone Preamplifier Circuit 有权
    麦克风前置放大器电路

    公开(公告)号：US20140153746A1

    公开(公告)日：2014-06-05

    申请号：US14129320

    申请日：2012-07-13

    Applicant: Germano Nicollini ,  Andrea Barbieri

    Inventor： Germano Nicollini ,  Andrea Barbieri

    IPC: H04R3/00

    CPC classification number: H04R3/00 ,  H03F3/005 ,  H03F3/187 ,  H03F3/45475 ,  H03F3/45928 ,  H03F3/45937 ,  H03F3/45959 ,  H03F2203/45512 ,  H03F2203/45514 ,  H03F2203/45528

    Abstract: A microphone preamplifier circuit (60) is described, adapted to be connected to a microphone circuit (MCD), the microphone circuit (MCD) comprising a microphone (3) and at least one output node (MO, MO′). The microphone preamplifier circuit (60) comprises a preamplifier (PA) comprising: —at least one input node (10, 10′) adapted to be connected to said output node (MO, MO′); —an operational amplifier (OA) comprising at least one input (20, 20′) and at least one output (21, 21′); —at least one input DC decoupling capacitor (CD, CD′) connected between said input node (10, 10′) and said first input of the operational amplifier (20,20′); at least one feedback capacitor (C2A, C2A′) connected between the input (20,20′) and the output (21, 21′) of the operational amplifier (OA) in order to set together with said input DC decoupling capacitor (CD, CD′) a gain value of the preamplifier circuit (60); —a first (40, 40′) and a second feed node (41, 41′) adapted to be fed by a first (VCIMIN) and a second (VCM) bias voltage respectively. The preamplifier (PA) further comprises at least one switched capacitor (C2B, C2B′) adapted to be selectively and alternatively connected under the control of a clock signal (CK): —between said input (20, 20′) and said output (21, 21′) of the operational amplifier (OA); and—between said first (40, 40′) and said second (41, 41′) feed node.

    Abstract translation: 麦克风前置放大器电路（60）被描述为适于连接到麦克风电路（MCD），麦克风电路（MCD）包括麦克风（3）和至少一个输出节点（MO，MO'）。 麦克风前置放大器电路（60）包括前置放大器（PA），包括： - 适于连接到所述输出节点（MO，MO'）的至少一个输入节点（10,10'）; - 运算放大器（OA），包括至少一个输入（20,20'）和至少一个输出（21,21'）; 连接在所述输入节点（10,10'）和所述运算放大器（20,20'）的所述第一输入端之间的至少一个输入DC去耦电容器（CD，CD'）; 连接在运算放大器（OA）的输入（20,20'）和输出（21,21'）之间的至少一个反馈电容器（C2A，C2A'），以便与所述输入DC去耦电容器 ，CD'）前置放大器电路（60）的增益值; - 第一（40,40'）和第二馈电节点（41,41'），分别适于由第一（VCIMIN）和第二（VCM）偏置电压馈送。 前置放大器（PA）还包括至少一个开关电容器（C2B，C2B'），其适于在时钟信号（CK）的控制下选择性地和可选地连接： - 在所述输入（20,20'）和所述输出（ 21，21'）; 并且在所述第一（40,40'）和所述第二（41,41'）馈送节点之间。

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