High dynamic range temperature sensor

    公开(公告)号:US11237065B2

    公开(公告)日:2022-02-01

    申请号:US16385616

    申请日:2019-04-16

    IPC分类号: G01K7/00 G01K7/34 G01K7/01

    摘要: A temperature sensor having a two-state input current, an element whose temperature is sensed based on a change in voltage across the element induced by the two states of the input current, a charge-to-digital converter, and a capacitor continuously connected between the element and the charge-to-digital converter. The capacitor experiences a charge difference due to the change in voltage across the element induced by the two states of the input current, and the charge-to-digital converter converts the charge difference to a digital value indicative of the temperature of the element. A two-state DC-shifting current having opposite polarity of the two-state input current, a pull-down resistor whose voltage varies with the two-states of the DC-shifting current, and a second capacitor continuously connected between the pull-down resistor and the charge-to-digital converter operate to shift down a DC operating point of the charge-to-voltage converter to increase its dynamic range.

    Hybrid autozeroing and chopping offset cancellation for switched-capacitor circuits

    公开(公告)号:US11012043B2

    公开(公告)日:2021-05-18

    申请号:US16544815

    申请日:2019-08-19

    IPC分类号: H03F3/45

    摘要: A system has an output and receives an input signal. An operational amplifier has an input, an output and an offset at the input. A switched capacitor network samples the input signal at a switched capacitor frequency. An autozeroing capacitor connected to the input of the operational amplifier captures the offset during an offset capture interval according to an autozeroing frequency. Chopping and autozeroing switches, connected between the autozeroing capacitor and the switched capacitor network, chop the sampled input signal according to a chopping frequency and autozero the captured offset according to the autozeroing frequency. De-chopping switches, connected between the output of the operational amplifier and the output of the system, operate on the output of the operational amplifier at the chopping frequency to chop the autozeroed captured offset and de-chop the chopped sampled input signal processed by the operational amplifier.

    System and method for removing error in a system having an analog-to-digital converter

    公开(公告)号:US10826512B1

    公开(公告)日:2020-11-03

    申请号:US16530618

    申请日:2019-08-02

    摘要: A system includes a first sensed voltage generated as a product of the first voltage reference and an unknown scalar, a second sensed voltage generated as a product of the first voltage reference and a known scalar, and an amplifier having gain error that generates a second voltage reference (first voltage reference or scaled version thereof). An ADC uses the second voltage reference to generate first and second digital values, representing the first and second sensed voltages, that contain error caused by the second voltage reference gain error. A processor uses the known scalar and a ratio based on the first and second digital values to remove the error from the first digital value. The first sensed voltage may be generated by pumping a current into a variable resistance sensor (VRS) whose resistance varies with respect to a time-varying stimulus (e.g., temperature) and is proportional to the unknown scalar.

    Chopped triangular wave PWM quantizer

    公开(公告)号:US10659029B2

    公开(公告)日:2020-05-19

    申请号:US16163638

    申请日:2018-10-18

    摘要: An apparatus in a PWM modulator includes a triangular wave generator that generates a triangular wave and a comparator that is responsive to a signal input to generate a signal output. An output of the PWM modulator is responsive to the comparator signal output. A polarity inversion circuit, coupled between the triangular wave generator and the comparator, is configured in one of the following ways: to provide the triangular wave to the comparator when the triangular wave has a first slope polarity and to provide a polarity-inverted version of the triangular wave to the comparator when the triangular wave has a second slope polarity opposite the first slope polarity; and to provide the signal input to the comparator when the triangular wave has the first slope polarity and to provide a polarity-inverted version of the signal input to the comparator when the triangular wave has the second slope polarity.

    TEMPERATURE SENSING WITH FEEDBACK DIGITAL-ANALOG CONVERTER (DAC) OF DELTA-SIGMA MODULATOR
    6.
    发明申请
    TEMPERATURE SENSING WITH FEEDBACK DIGITAL-ANALOG CONVERTER (DAC) OF DELTA-SIGMA MODULATOR 有权
    具有反馈数字转换器(DAC)的DELTA-SIGMA调制器的温度感测

    公开(公告)号:US20170045403A1

    公开(公告)日:2017-02-16

    申请号:US14826973

    申请日:2015-08-14

    IPC分类号: G01K13/00 G01K7/01

    CPC分类号: G01K7/01 G01K2219/00

    摘要: A delta-sigma modulator may be used to generate temperature information within an integrated circuit. The delta-sigma modulator may include a loop filter, a quantizer, and a feedback digital-to-analog converter (DAC). Temperature sensing elements may be incorporated into the feedback DAC of the delta-sigma modulator. Temperature information is then processed in the loop filter of the delta-sigma modulator and output in an average voltage value of a digital signal output from the delta-sigma modulator.

    摘要翻译: Δ-Σ调制器可用于在集成电路内产生温度信息。 Δ-Σ调制器可以包括环路滤波器,量化器和反馈数模转换器(DAC)。 温度感测元件可以并入Δ-Σ调制器的反馈DAC中。 然后在Δ-Σ调制器的环路滤波器中处理温度信息,并以从Δ-Σ调制器输出的数字信号的平均电压值输出。

    Voltage-controlled oscillator (VCO) as first stage in an analog-to-digital converter (ADC) in combination with a digital filter for second or higher-order noise shaping
    7.
    发明授权
    Voltage-controlled oscillator (VCO) as first stage in an analog-to-digital converter (ADC) in combination with a digital filter for second or higher-order noise shaping 有权
    压控振荡器(VCO)作为模数转换器(ADC)的第一级,与数字滤波器相结合,用于第二或更高阶噪声整形

    公开(公告)号:US09397692B1

    公开(公告)日:2016-07-19

    申请号:US14801620

    申请日:2015-07-16

    IPC分类号: H03M1/00 H03M3/00

    CPC分类号: H03M3/438 H03M1/60

    摘要: A delta-sigma modulation analog-to-digital converter (ADC) may be constructed by combining a VCO used for a first order filter with a digital loop filter used for a second or higher order of the ADC. One such ADC would include an analog input node configured to receive an analog signal; a voltage-controlled oscillator (VCO) comprising a first input configured to receive the analog signal, wherein the voltage-controlled oscillator is configured to implement a first order noise-shaping function; a digital loop filter comprising a second input configured to receive an output of the voltage-controlled oscillator (VCO); and a digital output node configured to output a digital signal based on an output of the digital loop filter. The digital loop filter may be configured to implement at least a first order noise-shaping function, but may also implement higher order noise-shaping functions.

    摘要翻译: Δ-Σ调制模数转换器(ADC)可以通过将用于一阶滤波器的VCO与用于ADC的第二或更高阶的数字环路滤波器组合来构成。 一个这样的ADC将包括被配置为接收模拟信号的模拟输入节点; 压控振荡器(VCO),包括被配置为接收所述模拟信号的第一输入,其中所述压控振荡器被配置为实现一阶噪声整形功能; 数字环路滤波器,包括被配置为接收压控振荡器(VCO)的输出的第二输入; 以及数字输出节点,被配置为基于数字环路滤波器的输出来输出数字信号。 数字环路滤波器可以被配置为实现至少一阶噪声整形功能,但也可以实现更高阶的噪声整形功能。

    RATIOMETRIC CURRENT-MONITOR SENSE RESISTANCE MISMATCH EVALUATION AND CALIBRATION

    公开(公告)号:US20220308613A1

    公开(公告)日:2022-09-29

    申请号:US17212124

    申请日:2021-03-25

    IPC分类号: G05F1/59 H03F3/217

    摘要: Current monitoring techniques are included in an electronic system that provides power to a load from a power output stage that supplies power to a load. Multiple current control devices form the power output stage in series with multiple sense resistors that provide corresponding sense voltages indicative of current provided through the multiple current control devices to the load in the same or different time intervals. A calibration control circuit controls injection of current through the multiple sense resistors individually and measures the corresponding sense voltages generated by the current to determine resistance values of the multiple sense resistors. A correction subsystem computes a first ratio of a first resistance to a second resistance and a second ratio of a third resistance to a fourth resistance of the multiple sense resistors, and controls compensation for a difference between the first ratio and the second ratio to remove the measurement error.

    Common-mode insensitive current-sensing topology in full-bridge driver with high-side and low-side energy matching calibration

    公开(公告)号:US11296663B2

    公开(公告)日:2022-04-05

    申请号:US16864893

    申请日:2020-05-01

    摘要: A system may include a Class-D stage comprising a first high-side switch coupled between a supply voltage and a first output terminal of the Class-D stage, a second high-side switch coupled between the supply voltage and a second output terminal of the Class-D stage, a first low-side switch coupled between a ground voltage and the first output terminal, and a second low-side switch coupled between the ground voltage and the second output terminal. The system may also include current sensing circuitry comprising a first sense resistor coupled between the first low-side switch and the ground voltage, such that an output current through a load coupled between the first output terminal and the second output terminal causes a first sense voltage proportional to the output current across the first sense resistor when the first low-side switch is activated. The current sensing circuitry may also include a second sense resistor coupled between the second low-side switch and the ground voltage, such that an output current through the load causes a second sense voltage proportional to the output current across the second sense resistor when the second low-side switch is activated. The system may also include measurement circuitry configured to measure the first sense voltage and the second sense voltage to determine the output current.

    PWM MODULATOR HAVING QUANTIZER CALIBRATABLE FOR MULTI-NON-IDEAL GAIN-AFFECTING CHARACTERISTICS

    公开(公告)号:US20210044285A1

    公开(公告)日:2021-02-11

    申请号:US16996779

    申请日:2020-08-18

    摘要: A PWM modulator has a quantizer that generates a PWM output signal to speaker driver. When a first voltage swing range is supplied to the speaker driver, the quantizer analog gain is controlled to be a first gain value. When a second PWM drive voltage swing range is supplied to the speaker driver, the analog gain is controlled to be a second gain value. The first and second gain values of the analog gain of the quantizer cause the combined gain of the quantizer and driver to be approximately equal in the two modes. The quantizer has at least two gain-affecting measurable non-ideal characteristics. The quantizer is adjustable using measured first and second values to correct for first and second of the at least two non-ideal characteristics. The gain of the quantizer is calibratable while the quantizer is adjusted using the measured first and second measured values.