公开(公告)号：US20230145662A1

公开(公告)日：2023-05-11

申请号：US17965308

申请日：2022-10-13

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Koichi TAKEDA ,  Takahiro SHIMOI ,  Masaya NAKANO ,  Hidenori MITANI ,  Yoshinobu KANEDA

IPC: H03F3/45

CPC classification number: H03F3/45744 ,  H03F3/45497 ,  H03F3/45511

Abstract: Speed enhancement of data reading is achieved while suppressing an influence of an offset voltage of a differential amplifier. The differential amplifier includes: a current source that is connected to a first power supply in which a suppliable current is a first current; an active element pair that is connected to the current source, and amplifies a signal input to an input terminal pair to output an output signal pair; a load element pair that is connected to a second power supply different in power supply voltage from the first power supply, the load element pair serving for outputting the output signal pair to an output terminal pair; and a capacitance element pair that is inserted between an external input terminal pair and the input terminal pair; a switching element pair that charges the capacitance element pair to generate a voltage, which is obtained by converting an offset voltage of the input terminal pair into an input voltage, in the capacitance element pair by short-circuiting corresponding terminals between the output terminal pair and the input terminal pair; and a current control circuit that controls a current suppliable by the current source to a second current larger than the first current at a time of performing the charge.

公开(公告)号：US20170163222A1

公开(公告)日：2017-06-08

申请号：US15442423

申请日：2017-02-24

Applicant: STMicroelectronics S.r.l.

Inventor： Francesco Carrara ,  Felice Alberto Torrisi ,  Francesco Clerici

IPC: H03F1/08 ,  H03F3/45

CPC classification number: H03F1/086 ,  H03F1/0205 ,  H03F1/083 ,  H03F3/45085 ,  H03F3/45179 ,  H03F3/45502 ,  H03F3/45511 ,  H03F2200/456 ,  H03F2203/45008 ,  H03F2203/45116 ,  H03F2203/45288 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45431

Abstract: A common-mode feedback circuit includes a transconductor input stage with differential input terminals, and a frequency-compensated gain stage coupled to the transconductor input stage with differential output terminals. The common-mode feedback circuit also includes a feedback loop having a comparator configured to produce a feedback error signal for the transconductor input stage by comparing with a reference a common-mode sensing signal indicative of a common-mode voltage level sensed at the differential output terminals. In addition, the common-mode feedback loop includes a converter for converting the common-mode voltage level sensed at said differential output terminals into a current signal coupled to the comparator.

公开(公告)号：US09288574B2

公开(公告)日：2016-03-15

申请号：US14374929

申请日：2013-02-11

Applicant: ST-Ericsson SA

Inventor： Sergio Pernici ,  Germano Nicollini

IPC: H03F99/00 ,  H04R3/00 ,  H03F3/185 ,  H03F3/45

CPC classification number: H04R3/00 ,  H03F3/1855 ,  H03F3/45183 ,  H03F3/45511 ,  H03F2200/03 ,  H03F2200/481 ,  H03F2203/45374 ,  H03F2203/45418 ,  H04R3/002

Abstract: The invention relates to a circuit (100) for use with a loudspeaker (104) having a first differential input terminal (t1) and a second differential input terminal (t2), the circuit (100) comprising: a differential power amplifier (103) having a first differential output terminal (t3) operatively connected to the first differential input terminal (t1) of the loudspeaker (104) and a second differential output terminal (t4) operatively connected to the second differential input terminal (t2) of the loudspeaker (104);—a first resistor (RS1) disposed between the first differential output terminal (t3) of the differential power amplifier (103) and the first differential input terminal (t1) of the loudspeaker (104); a second resistor (RS2) disposed between the second differential output terminal (t4) of the differential power amplifier (103) and the second differential input terminal (t2) of the loudspeaker (104). The circuit (100) further comprises: a first resistive module (RR1, RR2) arranged to generate on a respective output terminal (t5) a first control voltage (VIN), the first resistive module (RR1, RR2) having a first input terminal (t6) connected to the first differential output terminal (t3) of the power amplifier (103) and a second input terminal (t7) connected to the second differential input terminal (t2) of the loudspeaker (104), a second resistive module (RR3, RR4) arranged to generate on a respective output terminal (t8) a second control voltage (VIP), the second resistive module (RR3, RR4) having a first input terminal (t9) connected to the second differential output terminal (t4) of the power amplifier (103) and a second input terminal (t10) connected to the first differential input terminal (t1) of the loudspeaker (104). The loudspeaker circuit (100) being arranged to control the differential power amplifier (103) on the basis of the first control voltage (VIN) and the second control voltage (VIP).

公开(公告)号：US07696789B2

公开(公告)日：2010-04-13

申请号：US12153815

申请日：2008-05-23

Applicant: Naohiro Matsui

Inventor： Naohiro Matsui

IPC: H03D3/00

CPC classification number: H03D1/18 ,  H03F3/45085 ,  H03F3/45511 ,  H03F2200/78 ,  H03F2200/99

Abstract: Disclosed is a high-frequency signal detector circuit including a diode detector circuit for detecting an input signal by diode detection; a differential-input/differential output amplifier with a common mode feedback circuit, the amplifier including a differential amplifying circuit for differentially receiving outputs of the diode detector circuit and outputting a differential output signal, and a common mode feedback circuit for controlling the differential amplifying circuit in such a manner that a voltage corresponding to a mid-point of the differential output signal from the differential amplifying circuit will take on a voltage identical with a prescribed voltage; and a differential-input/single-ended output amplifier for receiving the differential output signal of the differential amplifying circuit and outputting a single-ended output signal. The circuit further includes a binarization circuit for receiving the output signal of the differential-input/single-ended output amplifier and comparing the output signal with a threshold voltage to thereby binarize and output the signal. The threshold voltage is adjustably set.

Abstract translation: 公开了一种高频信号检测器电路，其包括用于通过二极管检测来检测输入信号的二极管检测器电路; 具有共模反馈电路的差分输入/差分输出放大器，该放大器包括用于差分地接收二极管检测器电路的输出并输出差分输出信号的差分放大电路，以及用于控制差分放大电路的共模反馈电路 使得对应于来自差分放大电路的差分输出信号的中点的电压将接受与规定电压相同的电压; 以及用于接收差分放大电路的差分输出信号并输出​​单端输出信号的差分输入/单端输出放大器。 该电路还包括用于接收差分输入/单端输出放大器的输出信号的二值化电路，并将输出信号与阈值电压进行比较，从而二值化并输出信号。 阈值电压可调。

公开(公告)号：US06429700B1

公开(公告)日：2002-08-06

申请号：US09836153

申请日：2001-04-17

Applicant: Jungwook Yang

Inventor： Jungwook Yang

IPC: H03K300

CPC classification number: H03F3/45511 ,  H03F2203/45401 ,  H03F2203/45402 ,  H03F2203/45424 ,  H03F2203/45426 ,  H03F2203/45431 ,  H03F2203/45696 ,  H03F2203/45702

Abstract: A driver circuit having a minimized and/or controllable output common mode voltage comprises a differential amplifier having, a passive element as a biasing source for establishing a bias current in the differential amplifier and a control amplifier operatively coupled to the differential amplifier in a feedback arrangement, the control amplifier generating a control signal. The differential amplifier is responsive to the control signal for providing a voltage at an output of the driver circuit that is substantially independent of an input signal presented to an input of the driver circuit. By eliminating the need for an active device (e.g., transistor) as a bias current source, the output common mode voltage of the driver circuit is minimized. A reference signal coupled to the control amplifier, in conjunction with the feedback arrangement, substantially fixes the output common mode voltage of the driver circuit to a predetermined value.

Abstract translation: 具有最小化和/或可控制的输出共模电压的驱动器电路包括差分放大器，其具有作为用于在差分放大器中建立偏置电流的偏置源的无源元件和在反馈布置中可操作地耦合到差分放大器的控制放大器 ，所述控制放大器产生控制信号。 差分放大器响应于控制信号，以在驱动器电路的输出处提供基本上与呈现给驱动器电路的输入的输入信号无关的电压。 通过消除对作为偏置电流源的有源器件（例如，晶体管）的需要，驱动器电路的输出共模电压最小化。 耦合到控制放大器的参考信号结合反馈装置基本上将驱动器电路的输出共模电压固定为预定值。

公开(公告)号：US06346856B1

公开(公告)日：2002-02-12

申请号：US09571822

申请日：2000-05-16

Applicant: Brent A. Myers ,  Ramkishore Ganti

Inventor： Brent A. Myers ,  Ramkishore Ganti

IPC: H03F345

CPC classification number: H03F3/45937 ,  H03F3/45511 ,  H03F2203/45356 ,  H03F2203/45394 ,  H03F2203/45404 ,  H03F2203/45418

Abstract: A transconductor block including a Czarnul tuning network, transconductance resistors, an input voltage follower amplifier, a common mode circuit, PMOS transistors coupled in cascode configuration, an input current source, and high gain amplifiers that drive NMOS transistors at the output. The input voltage follower amplifier receives a differential input signal including a common mode voltage and applies the differential input signal to the Czarnul tuning network. The Czarnul tuning network includes series resistors and is coupled in parallel with the transconductance resistors. The common mode circuit receives the differential input signal and a reference common mode voltage and provides a bias voltage and a common mode feedback voltage. The common mode circuit asserts the common mode feedback voltage to the output PMOS transistors to establish a DC output current and to minimize drift of the common mode voltage of the transconductance block. Also, the bias voltage is level shifted from the common mode signal. The high gain amplifiers maintain the output of the Czarnul tuning network and transconductance resistors at the bias voltage. The high gain amplifiers are coupled to the input current sources and to the NMOS transistors in a negative feedback configuration. The high gain amplifiers drive the NMOS transistors to reflect an output current that corresponds to the input voltage signal.

Abstract translation: 包括Czarnul调谐网络，跨导电阻器，输入电压跟随器放大器，共模电路，以共源共模配置耦合的PMOS晶体管，输入电流源和在输出端驱动NMOS晶体管的高增益放大器的跨导体块。 输入电压跟随器放大器接收包括共模电压的差分输入信号，并将差分输入信号施加到Czarnul调谐网络。 Czarnul调谐网络包括串联电阻，并与跨导电阻并联耦合。 共模电路接收差分输入信号和参考共模电压，并提供偏置电压和共模反馈电压。 共模电路将输出PMOS晶体管的共模反馈电压置为直流输出电流，并使跨导块的共模电压的漂移最小化。 此外，偏置电压从共模信号电平移位。 高增益放大器保持Czarnul调谐网络和跨导电阻在偏置电压下的输出。 高增益放大器以负反馈配置耦合到输入电流源和NMOS晶体管。 高增益放大器驱动NMOS晶体管以反映与输入电压信号对应的输出电流。

公开(公告)号：US3786362A

公开(公告)日：1974-01-15

申请号：US3786362D

申请日：1972-02-07

Applicant: BELL TELEPHONE LABOR INC

Inventor： MARSH D ,  MAXFIELD T

IPC: H03F3/45 ,  H03F3/68

CPC classification number: H03F3/45511 ,  H03F3/4517 ,  H03F2203/45402 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45648 ,  H03F2203/45696

Abstract: An operational amplifier which provides a balanced output signal and whose differential input stage utilizes active loads. A common mode signal is derived from the balanced output signal and used via a comparator and a feedback loop to control the operation of the active loads.

Abstract translation: 一个运算放大器，提供平衡的输出信号，差分输入级采用有源负载。 共模信号从平衡输出信号导出，并通过比较器和反馈回路来控制有源负载的运行。

公开(公告)号：US3440554A

公开(公告)日：1969-04-22

申请号：US3440554D

申请日：1966-09-14

Applicant: BURR BROWN RES CORP

Inventor： MCGRAW DONALD R ,  GRAEME JERALD G

IPC: H03F3/45 ,  H03F3/04 ,  H03F1/32 ,  H03F3/68

CPC classification number: H03F3/45511 ,  H03F3/45085 ,  H03F3/45502 ,  H03F2203/45406 ,  H03F2203/45648 ,  H03F2203/45688 ,  H03F2203/45696

公开(公告)号：US09729126B2

公开(公告)日：2017-08-08

申请号：US14925799

申请日：2015-10-28

Applicant: Futurewei Technologies, Inc.

Inventor： Homero Luz Guimaraes ,  Matthew Richard Miller

IPC: H03F3/04 ,  G06G7/12 ,  H03H11/12 ,  H03F3/193 ,  H03F1/02 ,  H03F3/45

CPC classification number: H03F1/0205 ,  H03F1/086 ,  H03F3/193 ,  H03F3/3022 ,  H03F3/45183 ,  H03F3/45475 ,  H03F3/45511 ,  H03F2200/451 ,  H03H11/1256

Abstract: Method and implementation of gain-bandwidth product (GWB) tuning are disclosed. In an embodiment an operational amplifier (opamp) includes an input stage of the opamp including a differential device pair coupled to a tail device and configured to be responsive to a differential input signal for conducting a first current and an output stage of the opamp including a class AB interface stage circuit and a pair of output devices connected to the class AB interface stage circuit, wherein a first constant gm bias circuit is coupled to an input terminal of the class AB interface stage circuit.

公开(公告)号：US07514997B2

公开(公告)日：2009-04-07

申请号：US11518765

申请日：2006-09-11

Applicant: Jozef Adut

Inventor： Jozef Adut

IPC: H03F3/45

CPC classification number: H03F3/45085 ,  H03F1/3211 ,  H03F3/45089 ,  H03F3/45511 ,  H03F2200/447 ,  H03F2203/45224 ,  H03F2203/45392 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45632 ,  H03F2203/45652 ,  H03F2203/45681 ,  H03F2203/45722

Abstract: A waveform processing system, and associated methods and apparatus, may include a common mode feedback compensation circuit to adjust a voltage supplied to a differential circuit so as to substantially reduce or eliminate signal distortion associated with thermal tails. In an illustrative example, a feedback circuit may control a supply voltage to maintain a common mode voltage at the collectors of the input transistors of a differential amplifier. For example, the feedback may compensate for component tolerances and/or temperature changes that may cause the cause the input transistors to operate away from a nominal constant power operating point. In some embodiments, the differential circuit and common mode feedback compensation circuit may be configured to substantially reduce thermal tail effects by controlling the supply voltage to maintain a substantially constant power condition for the input transistors.

Abstract translation: 波形处理系统及相关联的方法和装置可以包括共模反馈补偿电路，用于调整提供给差分电路的电压，以便基本上减少或消除与热尾相关联的信号失真。 在说明性示例中，反馈电路可以控制电源电压以在差分放大器的输入晶体管的集电极处维持共模电压。 例如，反馈可以补偿组件公差和/或温度变化，这可能导致输入晶体管远离标称恒定功率工作点的操作。 在一些实施例中，差分电路和共模反馈补偿电路可以被配置为通过控制供电电压来维持输入晶体管的基本上恒定的功率条件来大大减少热尾效应。