公开(公告)号：US20050237087A1

公开(公告)日：2005-10-27

申请号：US10833815

申请日：2004-04-27

Applicant: Luthuli Dake ,  Jozef Adut

Inventor： Luthuli Dake ,  Jozef Adut

IPC: G05F3/24 ,  H03D1/00

CPC classification number: G05F3/242

Abstract: A current monitor (360) having a high performance, simple, and cost effective design that is independent of process, temperature and voltage is disclosed herein. The current monitor (360) includes a sensing transistor (340) that couples to the main transistor (312) of an adjoining voltage regulator. Specifically, the control and source nodes of each transistor couple to each other, respectively. The size of the main transistor (312) is a predetermined multiple integer n of the size of the sensing transistor. A first resistor (RS3) couples between a supply voltage and the drain node of the main transistor (312). A second resistor (RS1) couples between a supply voltage and the drain node of the sensing transistor (340), wherein the size of the second resistor (RS1) is equal to the size of the first resistor (RS3) multiplied by the predetermined multiple integer n. An inverting input of an amplifier (342) couples to the drain node of the sensing transistor (340), while a third resistor (RS2) connects between the supply voltage and a non-inverting input of the amplifier (342). The amplifier (342) drives a transistor (344) within a closed feedback loop to equalize the value of the voltages at both inputs of the amplifier (342). A feedback resistor (Rfdb2) coupled between the source node of the transistor (344) and ground. A comparator (348) connects to the source node of the transistor (344) and between a current source and a reference resistor (Rref) to provide an output voltage.

Abstract translation: 本文公开了具有独立于过程，温度和电压的高性能，简单且成本有效的设计的电流监视器（360）。 电流监视器（360）包括耦合到相邻电压调节器的主晶体管（312）的感测晶体管（340）。 具体来说，每个晶体管的控制和源节点分别相互耦合。 主晶体管（312）的尺寸是感测晶体管尺寸的预定的多个整数n。 第一电阻器（R S3 S3）耦合在主晶体管（312）的电源电压和漏极节点之间。 第二电阻器（R S1 S1）耦合在感测晶体管（340）的电源电压和漏极节点之间，其中第二电阻器（R S1 S1）的尺寸为 等于第一电阻（R S3 S3）乘以预定的多个整数n的大小。 放大器（342）的反相输入耦合到感测晶体管（340）的漏极节点，而第三电阻器（R S2 S2）连接在电源电压和非反相输入端 放大器（342）。 放大器（342）驱动闭合反馈环路内的晶体管（344）以均衡放大器（342）的两个输入处的电压值。 耦合在晶体管（344）的源极节点和地之间的反馈电阻器（R >fdb2）。 比较器（348）连接到晶体管（344）的源极节点，并连接在电流源和参考电阻器（R SUB ref）之间以提供输出电压。

公开(公告)号：US07514997B2

公开(公告)日：2009-04-07

申请号：US11518765

申请日：2006-09-11

Applicant: Jozef Adut

Inventor： Jozef Adut

IPC: H03F3/45

CPC classification number: H03F3/45085 ,  H03F1/3211 ,  H03F3/45089 ,  H03F3/45511 ,  H03F2200/447 ,  H03F2203/45224 ,  H03F2203/45392 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45632 ,  H03F2203/45652 ,  H03F2203/45681 ,  H03F2203/45722

Abstract: A waveform processing system, and associated methods and apparatus, may include a common mode feedback compensation circuit to adjust a voltage supplied to a differential circuit so as to substantially reduce or eliminate signal distortion associated with thermal tails. In an illustrative example, a feedback circuit may control a supply voltage to maintain a common mode voltage at the collectors of the input transistors of a differential amplifier. For example, the feedback may compensate for component tolerances and/or temperature changes that may cause the cause the input transistors to operate away from a nominal constant power operating point. In some embodiments, the differential circuit and common mode feedback compensation circuit may be configured to substantially reduce thermal tail effects by controlling the supply voltage to maintain a substantially constant power condition for the input transistors.

Abstract translation: 波形处理系统及相关联的方法和装置可以包括共模反馈补偿电路，用于调整提供给差分电路的电压，以便基本上减少或消除与热尾相关联的信号失真。 在说明性示例中，反馈电路可以控制电源电压以在差分放大器的输入晶体管的集电极处维持共模电压。 例如，反馈可以补偿组件公差和/或温度变化，这可能导致输入晶体管远离标称恒定功率工作点的操作。 在一些实施例中，差分电路和共模反馈补偿电路可以被配置为通过控制供电电压来维持输入晶体管的基本上恒定的功率条件来大大减少热尾效应。

公开(公告)号：US07026854B2

公开(公告)日：2006-04-11

申请号：US10851007

申请日：2004-05-21

Applicant: Luthuli Edem Dake ,  Jozef Adut

Inventor： Luthuli Edem Dake ,  Jozef Adut

IPC: H03K5/08

CPC classification number: H03K17/08142 ,  H03K17/0822 ,  H03K19/00315

Abstract: The present invention provides a system for producing high voltage, low power driver circuitry (300) that addresses a number of disparate design requirements. The present invention provides circuitry comprising a voltage supply (308) and an output node (302). A transistor (304) is provided. A first resistive element (312) is coupled to the voltage supply, while a second resistive element (314)—having a resistance value equal to that of the first resistive element—is coupled between a second terminal of the transistor and the output node. A first diode (310) is coupled to the first resistive element and to a first terminal of the transistor. A clamping system (316) is coupled to the transistor, and a current limiting system (318) is coupled to the clamping system.

Abstract translation: 本发明提供一种用于产生满足多个不同设计要求的高电压，低功率驱动电路（300）的系统。 本发明提供了包括电压源（308）和输出节点（302）的电路。 提供晶体管（304）。 第一电阻元件（312）耦合到电压源，而具有等于第一电阻元件的电阻值的电阻值的第二电阻元件（314）耦合在晶体管的第二端子和输出节点之间。 第一二极管（310）耦合到第一电阻元件和晶体管的第一端子。 钳位系统（316）耦合到晶体管，并且限流系统（318）耦合到钳位系统。

公开(公告)号：US08446203B1

公开(公告)日：2013-05-21

申请号：US13482760

申请日：2012-05-29

Applicant: Jozef Adut

Inventor： Jozef Adut

IPC: H03L5/00

CPC classification number: H03M1/129

Abstract: A low side clamp circuit has a control portion, a sense portion, and a clamp portion. When the sense portion detects that the input voltage of an output stage of a buffer has gone below a threshold voltage, it triggers the control portion to quickly turn on a clamp transistor (in the clamp portion) to clamp the output voltage to the clamp voltage. The control portion and sense portion have cross-coupled transistors that create increased speed and a sharp response with little or no voltage offset with a wide range of load currents. A clamp current source draws current through a resistor coupled in series between the base of the output transistor in the control portion and the collector of the output transistor in the sense portion. The clamp current is set to ClLo/R, where ClLo is the clamp voltage. A high side clamp is also described.

Abstract translation: 低侧钳位电路具有控制部分，感测部分和夹持部分。 当感测部分检测到缓冲器的输出级的输入电压已经低于阈值电压时，触发控制部分快速地接通钳位晶体管（在钳位部分中），以将输出电压钳位到钳位电压 。 控制部分和感测部分具有交叉耦合晶体管，其在宽范围的负载电流下产生增加的速度和具有很少或没有电压偏移的清晰响应。 钳位电流源通过串联在控制部分中的输出晶体管的基极和感测部分中的输出晶体管的集电极之间的电阻器来吸引电流。 钳位电流设置为ClLo / R，其中ClLo为钳位电压。 还描述了高侧夹具。

公开(公告)号：US20050258876A1

公开(公告)日：2005-11-24

申请号：US10851007

申请日：2004-05-21

Applicant: Luthuli Dake ,  Jozef Adut

Inventor： Luthuli Dake ,  Jozef Adut

IPC: H03B1/00 ,  H03K17/0814 ,  H03K17/082 ,  H03K19/003

CPC classification number: H03K17/08142 ,  H03K17/0822 ,  H03K19/00315

Abstract: The present invention provides a system for producing high voltage, low power driver circuitry (300) that addresses a number of disparate design requirements. The present invention provides circuitry comprising a voltage supply (308) and an output node (302). A transistor (304) is provided. A first resistive element (312) is coupled to the voltage supply, while a second resistive element (314)—having a resistance value equal to that of the first resistive element—is coupled between a second terminal of the transistor and the output node. A first diode (310) is coupled to the first resistive element and to a first terminal of the transistor. A clamping system (316) is coupled to the transistor, and a current limiting system (318) is coupled to the clamping system.

Abstract translation: 本发明提供一种用于产生满足多个不同设计要求的高电压，低功率驱动电路（300）的系统。 本发明提供了包括电压源（308）和输出节点（302）的电路。 提供晶体管（304）。 第一电阻元件（312）耦合到电压源，而具有等于第一电阻元件的电阻值的电阻值的第二电阻元件（314）耦合在晶体管的第二端子和输出节点之间。 第一二极管（310）耦合到第一电阻元件和晶体管的第一端子。 钳位系统（316）耦合到晶体管，并且限流系统（318）耦合到钳位系统。

公开(公告)号：US20080061877A1

公开(公告)日：2008-03-13

申请号：US11518765

申请日：2006-09-11

Applicant: Jozef Adut

Inventor： Jozef Adut

IPC: H03F3/45

CPC classification number: H03F3/45085 ,  H03F1/3211 ,  H03F3/45089 ,  H03F3/45511 ,  H03F2200/447 ,  H03F2203/45224 ,  H03F2203/45392 ,  H03F2203/45418 ,  H03F2203/45424 ,  H03F2203/45632 ,  H03F2203/45652 ,  H03F2203/45681 ,  H03F2203/45722

Abstract: A waveform processing system, and associated methods and apparatus, may include a common mode feedback compensation circuit to adjust a voltage supplied to a differential circuit so as to substantially reduce or eliminate signal distortion associated with thermal tails. In an illustrative example, a feedback circuit may control a supply voltage to maintain a common mode voltage at the collectors of the input transistors of a differential amplifier. For example, the feedback may compensate for component tolerances and/or temperature changes that may cause the cause the input transistors to operate away from a nominal constant power operating point. In some embodiments, the differential circuit and common mode feedback compensation circuit may be configured to substantially reduce thermal tail effects by controlling the supply voltage to maintain a substantially constant power condition for the input transistors.

Abstract translation: 波形处理系统及相关联的方法和装置可以包括共模反馈补偿电路，用于调整提供给差分电路的电压，以便基本上减少或消除与热尾相关联的信号失真。 在说明性示例中，反馈电路可以控制电源电压以在差分放大器的输入晶体管的集电极处维持共模电压。 例如，反馈可以补偿组件公差和/或温度变化，这可能导致输入晶体管远离标称恒定功率工作点的操作。 在一些实施例中，差分电路和共模反馈补偿电路可以被配置为通过控制供电电压来维持输入晶体管的基本上恒定的功率条件来大大减少热尾效应。

公开(公告)号：US06992523B2

公开(公告)日：2006-01-31

申请号：US10833815

申请日：2004-04-27

Applicant: Luthuli Edem Dake ,  Jozef Adut

Inventor： Luthuli Edem Dake ,  Jozef Adut

IPC: G05F1/10 ,  G05F3/02

CPC classification number: G05F3/242

Abstract: A current monitor (360) having a high performance, simple, and cost effective design that is independent of process, temperature and voltage is disclosed herein. The current monitor (360) includes a sensing transistor (340) that couples to the main transistor (312) of an adjoining voltage regulator. Specifically, the control and source nodes of each transistor couple to each other, respectively. The size of the main transistor (312) is a predetermined multiple integer n of the size of the sensing transistor. A first resistor (RS3) couples between a supply voltage and the drain node of the main transistor (312). A second resistor (RS1) couples between a supply voltage and the drain node of the sensing transistor (340), wherein the size of the second resistor (RS1) is equal to the size of the first resistor (RS3) multiplied by the predetermined multiple integer n. An inverting input of an amplifier (342) couples to the drain node of the sensing transistor (340), while a third resistor (RS2) connects between the supply voltage and a non-inverting input of the amplifier (342). The amplifier (342) drives a transistor (344) within a closed feedback loop to equalize the value of the voltages at both inputs of the amplifier (342). A feedback resistor (Rfdb2) coupled between the source node of the transistor (344) and ground. A comparator (348) connects to the source node of the transistor (344) and between a current source and a reference resistor (Rref) to provide an output voltage.

Abstract translation: 本文公开了具有独立于过程，温度和电压的高性能，简单且成本有效的设计的电流监视器（360）。 电流监视器（360）包括耦合到相邻电压调节器的主晶体管（312）的感测晶体管（340）。 具体来说，每个晶体管的控制和源节点分别相互耦合。 主晶体管（312）的尺寸是感测晶体管尺寸的预定的多个整数n。 第一电阻器（R S3 S3）耦合在主晶体管（312）的电源电压和漏极节点之间。 第二电阻器（R S1 S1）耦合在感测晶体管（340）的电源电压和漏极节点之间，其中第二电阻器（R S1 S1）的尺寸为 等于第一电阻（R S3 S3）乘以预定的多个整数n的大小。 放大器（342）的反相输入耦合到感测晶体管（340）的漏极节点，而第三电阻器（R S2 S2）连接在电源电压和非反相输入端 放大器（342）。 放大器（342）驱动闭合反馈环路内的晶体管（344）以均衡放大器（342）的两个输入处的电压值。 耦合在晶体管（344）的源极节点和地之间的反馈电阻器（R >fdb2）。 比较器（348）连接到晶体管（344）的源极节点，并连接在电流源和参考电阻器（R SUB ref）之间以提供输出电压。