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    OPERATIONAL AMPLIFIER CIRCUIT USING VARIABLE BIAS CONTROL
    1.
    发明申请
    OPERATIONAL AMPLIFIER CIRCUIT USING VARIABLE BIAS CONTROL 审中-公开

    公开(公告)号：US20180337646A1

    公开(公告)日：2018-11-22

    申请号：US15716789

    申请日：2017-09-27

    申请人： NOVATEK MICROELECTRONICS CORP.

    发明人： Chih-Wen Lu ,  Po-Yu Tseng ,  Jhih-Siou Cheng ,  Shang-I Liu ,  Chih-Hsien Chou

    IPC分类号： H03F3/45 ,  G05F1/56 ,  H03F3/30 ,  H03F1/32

    CPC分类号： G05F1/56 ,  H03F1/30 ,  H03F1/32 ,  H03F3/30 ,  H03F3/45

    摘要： An operational amplifier circuit is provided. The operational amplifier circuit includes a differential input stage circuit and a loading stage circuit. The differential input stage circuit includes a first current source, a first transistor, a second transistor, a third transistor, and a fourth transistor. The control terminal of the first transistor receives a first input signal. The control terminal of the second transistor receives a second input signal. The third transistor has a first terminal coupled to the second terminal of the first transistor, a second terminal coupled to the first current source, and a control terminal coupled to the control terminal of the second transistor. The fourth transistor has a first terminal coupled to the second terminal of the second transistor, a second terminal coupled to the first current source, and a control terminal coupled to the control terminal of the first transistor.

    Impedance converter and condenser microphone
    3.
    发明授权
    Impedance converter and condenser microphone 有权

    公开(公告)号：US09893691B2

    公开(公告)日：2018-02-13

    申请号：US15386174

    申请日：2016-12-21

    申请人： Hiroshi Akino

    发明人： Hiroshi Akino

    IPC分类号： H04R3/06 ,  H03F5/00 ,  H04R19/04 ,  H04R3/00

    CPC分类号： H03F5/00 ,  H03F3/30 ,  H03F3/3069 ,  H03F2200/03 ,  H03F2203/30078 ,  H03F2203/30111 ,  H04R3/00 ,  H04R19/04

    摘要： In an impedance converter using an electron tube as an active element, output impedance can be made sufficiently low, and the number of circuit elements therefor is decreased and a circuit configuration therefor is made simple. Provided is an impedance converter having an electron tube cathode-follower connected. The impedance converter includes a bias diode that provides a bias voltage to a cathode of the electron tube, high resistance elements that provide a voltage of the bias diode to a grid of the electron tube, a load circuit connected to the electron tube, and a complementary emitter output circuit including two transistors, respective bases of which are connected to one end and the other end of the bias diode.

    BUFFER CIRCUIT
    7.
    发明申请
    BUFFER CIRCUIT 有权
    缓冲电路

    公开(公告)号：US20150357974A1

    公开(公告)日：2015-12-10

    申请号：US14455991

    申请日：2014-08-11

    申请人： ILI TECHNOLOGY CORP.

    发明人： CHIH-KANG CHENG ,  TZUNG-YUN TSAI

    IPC分类号： H03F1/02 ,  H03F3/45

    CPC分类号： H03F3/45179 ,  H03F1/0277 ,  H03F1/307 ,  H03F3/211 ,  H03F3/30 ,  H03F3/3022 ,  H03F3/45 ,  H03F3/45475 ,  H03F2203/45138

    摘要： The present disclosure provides a buffer circuit comprising a plurality of operational amplifiers and a switch module. Each operational amplifier forms a buffer. The operational amplifier has an output stage. The stage has a first transistor and a second transistor. The first transistor and the second transistor are connected to an output terminal. The first transistor has a first control terminal. The second transistor has a second control terminal. The switch module is connected to the first control terminal of the first transistor and the second control terminal of the second transistor. The switch module connects together at least two of the first terminals of the first transistor according to a control signal. The switch module connects together at least two of the second terminals of the second transistor according to the control signal.

    摘要翻译： 本公开提供了一种包括多个运算放大器和开关模块的缓冲电路。 每个运算放大器形成缓冲器。 运算放大器有一个输出级。 该级具有第一晶体管和第二晶体管。 第一晶体管和第二晶体管连接到输出端。 第一晶体管具有第一控制端。 第二晶体管具有第二控制端子。 开关模块连接到第一晶体管的第一控制端和第二晶体管的第二控制端。 开关模块根据控制信号将第一晶体管的至少两个第一端子连接在一起。 开关模块根据控制信号将第二晶体管的至少两个第二端子连接在一起。

    MULTIPLE-STATE, SWITCH-MODE POWER AMPLIFIER SYSTEMS AND METHODS OF THEIR OPERATION
    8.
    发明申请
    MULTIPLE-STATE, SWITCH-MODE POWER AMPLIFIER SYSTEMS AND METHODS OF THEIR OPERATION 有权
    多状态，开关式功率放大器系统及其运行方法

    公开(公告)号：US20150155840A1

    公开(公告)日：2015-06-04

    申请号：US14559895

    申请日：2014-12-03

    申请人： FREESCALE SEMICONDUCTOR, INC.

    发明人： JEAN-CHRISTOPHE NANAN ,  JEAN-JACQUES BOUNY ,  CEDRIC CASSAN ,  JOSEPH STAUDINGER ,  HUGUES BEAULATON

    IPC分类号： H03F3/217

    CPC分类号： H03F3/2178 ,  H03F3/189 ,  H03F3/211 ,  H03F3/2171 ,  H03F3/2175 ,  H03F3/2176 ,  H03F3/245 ,  H03F3/30 ,  H03F3/604 ,  H03F3/72 ,  H03F2200/09 ,  H03F2200/537 ,  H03F2200/541 ,  H03F2203/21106 ,  H03F2203/21142 ,  H03F2203/21145 ,  H03F2203/21157 ,  H03M1/0682 ,  H03M1/78

    摘要： An embodiment of an amplifier includes N (N>1) switch-mode power amplifier (SMPA) branches. Each SMPA branch includes two drive signal inputs and one SMPA branch output. A module coupled to the amplifier samples an input RF signal, and produces combinations of drive signals based on the samples. When an SMPA branch receives a first combination of drive signals, it produces an output signal at a first voltage level. Conversely, when the SMPA branch receives a different second combination of drive signals, it produces the output signal at a different second voltage level. Finally, when the SMPA branch receives a different third combination of drive signals, it produces the output signal at a voltage level of substantially zero. A combiner combines the output signals from all of the SMPA branches to produce a combined output signal that may have, at any given time, one of 2*N+1 quantization states.

    摘要翻译： 放大器的一个实施例包括N（N> 1）个开关模式功率放大器（SMPA）分支。 每个SMPA分支包括两个驱动信号输入和一个SMPA分支输出。 耦合到放大器的模块对输入RF信号进行采样，并且基于样本产生驱动信号的组合。 当SMPA分支接收到驱动信号的第一组合时，其产生处于第一电压电平的输出信号。 相反，当SMPA分支接收到不同的驱动信号的第二组合时，它产生不同的第二电压电平的输出信号。 最后，当SMPA分支接收到不同的驱动信号的第三组合时，它产生基本为零的电压电平的输出信号。 组合器组合来自所有SMPA分支的输出信号以产生在任何给定时间可以具有2×N + 1个量化状态之一的组合输出信号。

    MULTIPLE-STATE, SWITCH-MODE POWER AMPLIFIER SYSTEMS AND METHODS OF THEIR OPERATION
    9.
    发明申请
    MULTIPLE-STATE, SWITCH-MODE POWER AMPLIFIER SYSTEMS AND METHODS OF THEIR OPERATION 有权
    多状态，开关式功率放大器系统及其运行方法

    公开(公告)号：US20150155830A1

    公开(公告)日：2015-06-04

    申请号：US14559898

    申请日：2014-12-03

    申请人： FREESCALE SEMICONDUCTOR, INC.

    发明人： JOSEPH STAUDINGER ,  HUGUES BEAULATON ,  DAMON G. HOLMES ,  JEAN-CHRISTOPHE NANAN

    IPC分类号： H03F1/02 ,  H03F3/19 ,  H03F3/217

    CPC分类号： H03F1/0205 ,  H03F3/189 ,  H03F3/19 ,  H03F3/211 ,  H03F3/2171 ,  H03F3/2175 ,  H03F3/2176 ,  H03F3/2178 ,  H03F3/245 ,  H03F3/30 ,  H03F3/602 ,  H03F3/72 ,  H03F2200/09 ,  H03F2200/171 ,  H03F2200/451 ,  H03F2200/537 ,  H03F2200/541 ,  H03F2203/21106 ,  H03F2203/21142

    摘要： An embodiment of an amplifier includes N (N>1) switch-mode power amplifier (SMPA) branches. Each SMPA branch includes two drive signal inputs and one SMPA branch output. A module coupled to the amplifier samples an input RF signal, and produces combinations of drive signals based on the samples. When an SMPA branch receives a first combination of drive signals, it produces an output signal at one voltage level. Conversely, when the SMPA branch receives a different second combination of drive signals, it produces the output signal at another voltage level. At least two of the SMPA branches produce output signals having different absolute magnitudes. A combiner combines the output signals from all of the SMPA branches to produce a combined output signal that may have, at any given time, one of 2*N+1 quantization states.

    摘要翻译： 放大器的一个实施例包括N（N> 1）个开关模式功率放大器（SMPA）分支。 每个SMPA分支包括两个驱动信号输入和一个SMPA分支输出。 耦合到放大器的模块对输入RF信号进行采样，并且基于样本产生驱动信号的组合。 当SMPA分支接收到驱动信号的第一组合时，它产生一个电压电平的输出信号。 相反，当SMPA分支接收到不同的驱动信号的第二组合时，它产生另一个电压电平的输出信号。 至少两个SMPA分支产生具有不同绝对值的输出信号。 组合器组合来自所有SMPA分支的输出信号以产生在任何给定时间可以具有2×N + 1个量化状态之一的组合输出信号。

    Amplifier, fully-differential amplifier and delta-sigma modulator
    10.
    发明授权
    Amplifier, fully-differential amplifier and delta-sigma modulator 有权
    放大器，全差分放大器和Δ-Σ调制器

    公开(公告)号：US08638250B2

    公开(公告)日：2014-01-28

    申请号：US13590491

    申请日：2012-08-21

    申请人： Chen-Yen Ho ,  Chi-Lun Lo ,  Hung-Chieh Tsai ,  Yu-Hsin Lin

    发明人： Chen-Yen Ho ,  Chi-Lun Lo ,  Hung-Chieh Tsai ,  Yu-Hsin Lin

    IPC分类号： H03M3/00

    CPC分类号： H03F1/0205 ,  H03F3/265 ,  H03F3/30 ,  H03F3/3023 ,  H03F3/45071 ,  H03F3/45179 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2200/18 ,  H03F2203/30021 ,  H03F2203/30033 ,  H03F2203/45022 ,  H03F2203/45134 ,  H03F2203/45138 ,  H03M3/39 ,  H03M3/50

    摘要： An amplifier, a fully-differential amplifier and a delta-sigma modulator are disclosed. The disclosed amplifier includes a front-end gain stage, an AC-coupled push-pull output stage and a compensation circuit. The compensation circuit is coupled between the front-end gain stage and an output terminal of the amplifier. The AC-coupled push-pull output stage uses an AC-coupled capacitor (which is a passive two terminal electrical component rather than a stray or parasitic capacitance of a transistor) to couple the front-end gain stage to a gate of a top or bottom transistor of a push-pull structure introduced in the AC-coupled push-pull output stage, and uses a resistance component to couple a gate of the top or bottom transistor (depending on which one is coupled to the AC-coupled capacitor) to a bias voltage level.

    摘要翻译： 公开了放大器，全差分放大器和Δ-Σ调制器。 所公开的放大器包括前端增益级，AC耦合推挽输出级和补偿电路。 补偿电路耦合在前端增益级与放大器的输出端之间。 交流耦合推挽输出级使用交流耦合电容器（其是无源双端电气元件而不是晶体管的杂散或寄生电容），以将前端增益级耦合到顶部的栅极或 引入到AC耦合推挽输出级中的推挽结构的底部晶体管，并且使用电阻分量将顶部或底部晶体管的栅极（取决于耦合到AC耦合电容器的栅极）耦合到 偏置电压电平。