Abstract:
A chip component 10 comprises: an insulating substrate 1 on which a resistor 3 serving as a functional element is formed; a pair of internal electrodes (front electrodes 2, end surface electrodes 6, and back electrodes 5) that is formed to cover both end portions of the insulating substrate 1 and connected to the resistor 3; a barrier layer 8 that is formed on a surface of each of the internal electrodes and mainly composed of nickel; and an external connection layer 9 that is formed on a surface of the barrier layer 8 and mainly composed of tin, and the barrier layer 8 is composed of alloy plating (Ni—P) including nickel and phosphorus, which is formed by electrolytic plating, and a content rate of phosphorus in the alloy plating of an inner region is made different from that of an outer region so that at least the inner region of the barrier layer 8 has magnetic properties.
Abstract:
A resistor includes a resistive element including a first surface and a second surface; a protective film having electrical insulating properties disposed on the first surface; and a pair of electrodes in contact with the resistive element. The protective film includes a first outer edge and a second outer edge. The resistive element includes a first slit and a second slit extending from the first surface through to the second surface and extending in the second direction. The first slit is located closest to the first outer edge; and the second slit is located closest to the second outer edge. As viewed in the thickness direction, a first distance from the first outer edge to the first slit and a second distance from the second outer edge to the second slit together have a length 15% or greater of a dimension of the protective film in the first direction.
Abstract:
Methods and apparatus providing a vertically constructed, temperature sensing resistor are disclosed. An example apparatus includes a semiconductor substrate including a first doped region, a second doped region, and a third doped region between the first and second doped regions, the third doped region including a temperature sensitive semiconductor material; a first contact coupled to the first doped region; a second contact opposite the first contact coupled to the second doped region; and an isolation trench to circumscribe the third doped region.
Abstract:
A chip resistor includes: a board having a device formation surface, a back surface opposite from the device formation surface and side surfaces connecting the device formation surface to the back surface, a resistor portion provided on the device formation surface, a first connection electrode and a second connection electrode provided on the device formation surface and electrically connected to the resistor portion, and a resin film covering the device formation surface with the first connection electrode and the second connection electrode being exposed therefrom. Intersection portions of the board along which the back surface intersects the side surfaces each have a rounded shape.
Abstract:
There is provided a resistor in which a first resistive part of a resistive element that electrically conducts between a pair of electrodes formed on either end of an insulating substrate has a meandering pattern meandering on the substrate surface and a swelling pattern that has a form in which a part of the meandering pattern swells out from the stroke width of the meandering pattern, a second resistive part that is electrically connected in series to the first resistive part is shorter than the entire length of the first resistive part, and has a wider width than the stroke width of the meandering pattern, and a trimming groove is formed in at least either the swelling pattern or the second resistive part. This can improve resistance accuracy and provide a high voltage resistor with high withstand voltage property.
Abstract:
A high voltage resistor includes a ceramic substrate having a surface and defining a groove, and a resistive film deposited in the groove such that the resistive film is recessed relative to the surface of the ceramic substrate.
Abstract:
A coordinate detecting device includes a resistive film formed on a substrate and a common electrode for applying a voltage to the resistive film, wherein a potential distribution is created in the resistive film, an electric potential of the resistive film at a contact position is detected, and a position of the contact position of the resistive film is detected. In a manufacturing apparatus, a laser light source irradiates laser light to remove a part of the resistive film to form a resistive film removed part, an optical system converges the laser light, a plurality of probes measure electric potentials of a surface of the resistive film with the common electrode providing the voltage to the resistive film, an X-Y table moves the substrate at least two-dimensionally, and a control part controls the X-Y table and the laser light source.
Abstract:
[Subject] To provide a chip resistor free from chipping of corner portions thereof and a method of producing the chip resistor.[Solution] The chip resistor (1) includes: a board (2) having a device formation surface (2A), a back surface (2B) opposite from the device formation surface (2A) and side surfaces (2C-2F) connecting the device formation surface (2A) to the back surface (2B), a resistor portion (56) provided on the device formation surface (2A), a first connection electrode (3) and a second connection electrode (4) provided on the device formation surface (2A) and electrically connected to the resistor portion (56), and a resin film (24) covering the device formation surface (2A) with the first connection electrode (3) and the second connection electrode (4) being exposed therefrom. Intersection portions (11) of the board (2) along which the back surface (2B) intersects the side surfaces (2C-2F) each have a rounded shape.
Abstract:
[Theme] A compact and refined chip resistor, with which a plurality of types of required resistance values can be accommodated readily with the same design structure, was desired.[Solution Means] A chip resistor 10 is arranged to have a resistor network 14 on a substrate. The resistor network 14 includes a plurality of resistor bodies R arrayed in a matrix and having an equal resistance value. A plurality of types of resistance units are respectively arranged by one or a plurality of the resistor bodies R being connected electrically. The plurality of types of resistance units are connected in a predetermined mode using connection conductor films C and fuse films F. By selectively fusing a fuse film F, a resistance unit can be electrically incorporated into the resistor network 14 or electrically separated from the resistor network to make the resistance value of the resistor network 14 the required resistance value.
Abstract:
A method for altering a resistance of a resistor including trimming the resistor using a first type of trim approach to increase a resistance measurement of the resistor to above a target resistance value, and iteratively trimming the resistor using a second type of trim approach until a power coefficient of resistance (PCR) or temperature coefficient of resistance (TCR) measurement of the resistor is substantially close to zero.