公开(公告)号：US20060183259A1

公开(公告)日：2006-08-17

申请号：US10906972

申请日：2005-03-15

Applicant: Wei-Shun Lai ,  Shu-Hua Hu ,  Kuan-Jui Huang ,  Chin-Chang Pan ,  Yuan-Chin Hsu

Inventor： Wei-Shun Lai ,  Shu-Hua Hu ,  Kuan-Jui Huang ,  Chin-Chang Pan ,  Yuan-Chin Hsu

IPC: H01L21/00

CPC classification number: B81C1/00365 ,  B81C2201/0132 ,  B81C2201/018 ,  H01L23/3192 ,  H01L24/11 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05184 ,  H01L2224/05572 ,  H01L2224/1147 ,  H01L2224/13006 ,  H01L2224/13099 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01022 ,  H01L2924/01033 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2924/013

Abstract: A substrate is provided. The substrate includes a plurality of devices disposed in the substrate, a plurality of contact pads disposed on a surface of the substrate and electrically connected to the devices, and a surface dielectric layer positioned on the surface of the substrate. Thereafter, a surface treatment process including at least a plasma etching process is performed. Subsequently, at least a plasma enhanced chemical vapor deposition (PECVD) process is performed to form a dielectric layer on a surface dielectric layer. The PECVD process is performed in a high frequency/low frequency alternating manner. Following that, a masking pattern on the dielectric layer is formed, and an anisotropic etching process is carried out to form a plurality of openings corresponding to the contact pads in the dielectric layer. The openings expose the contact pads, and each opening has an outwardly-inclined sidewall.

Abstract translation: 提供基板。 衬底包括设置在衬底中的多个器件，设置在衬底的表面上并电连接到器件的多个接触焊盘以及位于衬底表面上的表面电介质层。 此后，进行至少包括等离子体蚀刻工艺的表面处理工艺。 随后，至少进行等离子体增强化学气相沉积（PECVD）工艺以在表面电介质层上形成电介质层。 以高频/低频交替方式执行PECVD处理。 接着，形成电介质层上的掩模图案，进行各向异性蚀刻处理，以形成对应于电介质层中的接触焊盘的多个开口。 这些开口暴露接触垫，并且每个开口具有向外倾斜的侧壁。

公开(公告)号：US06399177B1

公开(公告)日：2002-06-04

申请号：US09580105

申请日：2000-05-30

Applicant: Stephen J. Fonash ,  Ali Kaan Kalkan ,  Sanghoon Bae

Inventor： Stephen J. Fonash ,  Ali Kaan Kalkan ,  Sanghoon Bae

IPC: B32B700

CPC classification number: B81C1/0038 ,  B81C1/00047 ,  B81C2201/0115 ,  B81C2201/0139 ,  B81C2201/018 ,  C23C16/24 ,  C23C16/511 ,  G01N21/17 ,  G01N27/121 ,  G01N27/44717 ,  G01N30/6095 ,  H01J49/0418 ,  Y10T428/24174 ,  Y10T428/249953

Abstract: A novel porous film is disclosed comprising a network of silicon columns in a continuous void which may be fabricated using high density plasma deposition at low temperatures, i.e., less than about 250° C. This silicon film is a two-dimensional nano-sized array of rodlike columns. This void-column morphology can be controlled with deposition conditions and the porosity can be varied up to 90%. The simultaneous use of low temperature deposition and etching in the plasma approach utilized, allows for the unique opportunity of obtaining columnar structure, a continuous void, and polycrystalline column composition at the same time. Unique devices may be fabricated using this porous continuous film by plasma deposition of this film on a glass, metal foil, insulator or plastic substrates.

Abstract translation: 公开了一种新颖的多孔膜，其包括在连续空隙中的硅柱网络，其可以在低温下（即小于约250℃）下使用高密度等离子体沉积来制造。该硅膜是二维纳米尺寸阵列 的棒状柱。 这种空隙柱形态可以用沉积条件控制，并且孔隙率可以变化高达90％。 在所采用的等离子体方法中同时使用低温沉积和蚀刻允许在同时获得柱状结构，连续空隙和多晶柱组成的独特机会。 可以使用这种多孔连续膜通过将该膜等离子体沉积在玻璃，金属箔，绝缘体或塑料基底上来制造独特的器件。

公开(公告)号：US20120043649A1

公开(公告)日：2012-02-23

申请号：US13202951

申请日：2010-02-24

Applicant: Abdennour Abbas ,  Didier Guillochon ,  Bertrand Bocquet ,  Philippe Supiot

Inventor： Abdennour Abbas ,  Didier Guillochon ,  Bertrand Bocquet ,  Philippe Supiot

IPC: H01L21/02 ,  H01L29/02

CPC classification number: B81C1/00071 ,  B81B2201/0214 ,  B81B2201/058 ,  B81B2203/0338 ,  B81C2201/0108 ,  B81C2201/018

Abstract: The present invention relates to a process for fabricating microchannels on a substrate and to a substrate comprising these microchannels, the invention being especially applicable to the fabrication of microstructured substrates for microelectronic, microfluidic and/or micromechanical systems.The process includes a step (a) of producing at least one or at least two patterns 2 on the surface of a bottom layer 1 and a step (b) of depositing, on top of the bottom layer and the pattern or patterns, a layer 3 of polymer material obtained by polymerizing an organic or organometallic monomer that contains siloxane functional groups, for example tetramethyldisiloxane, in a plasma-enhanced, optionally remote plasma-enhanced, chemical vapor deposition reactor (PECVD or optionally RPECVD) reactor.The layer of polymer material is deposited so as to create, in place of the pattern and after development by decomposing this pattern, or between the two patterns without development/decomposition, a channel 4a, 4b, 4c, 4d closed over at least part of its length.

Abstract translation: 本发明涉及一种用于在衬底上制造微通道的方法以及包括这些微通道的衬底，本发明特别适用于微电子，微流体和/或微机械系统的微结构化衬底的制造。 该方法包括在底层1的表面上产生至少一个或至少两个图案2的步骤（a）和在底层和图案或图案的顶部上沉积层（b）的步骤 通过聚合含有硅氧烷官能团的有机或有机金属单体（例如四甲基二硅氧烷）在等离子体增强的，任选地远程等离子体增强的化学气相沉积反应器（PECVD或任选的RPECVD）反应器中获得的聚合物材料3。 沉积聚合物材料层，以通过分解该图案或在两个图案之间或不在显影/分解下产生代替图案和显影之后，通道4a，4b，4c，4d在至少部分 它的长度。

公开(公告)号：US20080274301A1

公开(公告)日：2008-11-06

申请号：US12149367

申请日：2008-04-30

Applicant: Frederic-Xavier Gaillard ,  Laurent Vandroux

Inventor： Frederic-Xavier Gaillard ,  Laurent Vandroux

IPC: H05H1/24

CPC classification number: H01L21/0337 ,  B01D67/0034 ,  B01D2325/08 ,  B81B2203/0315 ,  B81B2203/0338 ,  B81C1/00031 ,  B81C2201/018 ,  H01L21/3086 ,  H01L21/7682

Abstract: Polymer sites are formed on a support. These sites are subjected to a plasma deposition of dielectric material and preferably react with this plasma so as to form openings at the level of said sites. A pattern structure is then formed in the dielectric material and/or in the polymer.

Abstract translation: 聚合物位点形成在载体上。 对这些位置进行电介质材料的等离子体沉积，并优选与该等离子体反应，以在所述位置的水平面上形成开口。 然后在电介质材料和/或聚合物中形成图案结构。

公开(公告)号：US09220852B2

公开(公告)日：2015-12-29

申请号：US13856637

申请日：2013-04-04

Applicant: Klaus Kadel

Inventor： Klaus Kadel

IPC: A61M11/02 ,  B81C1/00

CPC classification number: A61M11/02 ,  B81C1/00206 ,  B81C2201/0112 ,  B81C2201/018

Abstract: In a method of producing trench-like depressions in the surface of a wafer, particularly a silicon wafer, by plasma etching, in which the depressions are produced by alternate passivation and etching, each depression in its final geometry is provided with a protective layer of the polytetrafluoroethylene type.

Abstract translation: 在通过等离子体蚀刻在晶片表面，特别是硅晶片的表面中产生沟槽状凹陷的方法中，其中通过交替的钝化和蚀刻产生凹陷，其最终几何形状中的每个凹陷设置有保护层 聚四氟乙烯型。

公开(公告)号：US20100173153A1

公开(公告)日：2010-07-08

申请号：US12449664

申请日：2008-02-20

Applicant: Kenji Hata ,  Yuhei Hayamizu

Inventor： Kenji Hata ,  Yuhei Hayamizu

IPC: B32B5/16 ,  C23C16/26

CPC classification number: B81C1/0015 ,  B81C2201/018 ,  B82Y10/00 ,  B82Y15/00 ,  B82Y30/00 ,  B82Y40/00 ,  C01B32/16 ,  C01B32/162 ,  C01B2202/08 ,  H01L51/0048 ,  Y10T428/2918

Abstract: A beam-like material 1, 11 is formed of a CNT aggregate 25 comprising a plurality of CNTs aligned in the same direction and having a weight density of from 0.1 to 1.5 g/cm3, thereby providing a beam-like material comprising a CNT aggregate having anisotropy and shape restorability and capable of being formed to a desired shape at a desired position.

Abstract translation: 束状材料1,11由CNT组合体25形成，CNT组合体25包括沿相同方向排列的多个CNT，重量密度为0.1至1.5g / cm 3，从而提供包含CNT聚集体的束状材料 具有各向异性和形状可恢复性，并且能够在期望的位置形成所需的形状。

公开(公告)号：US20070207584A1

公开(公告)日：2007-09-06

申请号：US11364334

申请日：2006-03-01

Applicant: Alok Paranjpye ,  Douglas Thompson

Inventor： Alok Paranjpye ,  Douglas Thompson

IPC: H01L21/8222

CPC classification number: B81C1/0069 ,  B81B2201/014 ,  B81C2201/018 ,  G03F7/40 ,  H01H61/04 ,  H01H2061/008

Abstract: A method for curing an epoxy-based photoresist uses a continuously varying temperature profile, to continuously raise the kinetic energy of the monomers involved in the curing process, allowing them to cross-link. By using the continuously varying temperature profile, the maximum temperature to achieve a more completely cured film is reduced, as is the total processing time. In addition, curing using the continuously varying temperature profile is a single step method, rather than a multi-step method of the prior art, significantly simplifying the process flow for producing the cured structures. The cured structures may have mechanical properties which render them suitable as functional elements of various MEMS devices, including rigid, dielectric tethers used in MEMS thermal switches, for example.

Abstract translation: 固化环氧系光致抗蚀剂的方法使用连续变化的温度分布，以连续提高参与固化过程的单体的动能，从而使它们交联。 通过使用连续变化的温度曲线，总的处理时间也减少了实现更完全固化的膜的最高温度。 此外，使用连续变化的温度分布的固化是单步法，而不是现有技术的多步法，显着简化了用于生产固化结构的工艺流程。 固化的结构可以具有机械性质，使得它们适合作为各种MEMS装置的功能元件，例如包括用于MEMS热开关的刚性介电系绳。

公开(公告)号：US08962487B2

公开(公告)日：2015-02-24

申请号：US13202951

申请日：2010-02-24

Applicant: Abdennour Abbas ,  Didier Guillochon ,  Bertrand Bocquet ,  Philippe Supiot

Inventor： Abdennour Abbas ,  Didier Guillochon ,  Bertrand Bocquet ,  Philippe Supiot

IPC: H01L21/311 ,  H01L29/06 ,  B81C1/00

CPC classification number: B81C1/00071 ,  B81B2201/0214 ,  B81B2201/058 ,  B81B2203/0338 ,  B81C2201/0108 ,  B81C2201/018

Abstract: The present invention relates to a process for fabricating microchannels on a substrate and to a substrate comprising these microchannels, the invention being especially applicable to the fabrication of microstructured substrates for microelectronic, microfluidic and/or micromechanical systems.The process includes a step (a) of producing at least one or at least two patterns 2 on the surface of a bottom layer 1 and a step (b) of depositing, on top of the bottom layer and the pattern or patterns, a layer 3 of polymer material obtained by polymerizing an organic or organometallic monomer that contains siloxane functional groups, for example tetramethyldisiloxane, in a plasma-enhanced, optionally remote plasma-enhanced, chemical vapor deposition reactor (PECVD or optionally RPECVD) reactor.The layer of polymer material is deposited so as to create, in place of the pattern and after development by decomposing this pattern, or between the two patterns without development/decomposition, a channel 4a, 4b, 4c, 4d closed over at least part of its length.

Abstract translation: 本发明涉及一种用于在衬底上制造微通道的方法以及包括这些微通道的衬底，本发明特别适用于微电子，微流体和/或微机械系统的微结构化衬底的制造。 该方法包括在底层1的表面上产生至少一个或至少两个图案2的步骤（a）和在底层和图案或图案的顶部上沉积层（b）的步骤 通过聚合含有硅氧烷官能团的有机或有机金属单体（例如四甲基二硅氧烷）在等离子体增强的，任选地远程等离子体增强的化学气相沉积反应器（PECVD或任选的RPECVD）反应器中获得的聚合物材料3。 沉积聚合物材料层，以通过分解该图案或在两个图案之间或不在显影/分解下产生代替图案和显影之后，通道4a，4b，4c，4d在至少部分 它的长度。

公开(公告)号：US20130263847A1

公开(公告)日：2013-10-10

申请号：US13856637

申请日：2013-04-04

Applicant: Klaus KADEL

Inventor： Klaus KADEL

IPC: A61M11/02

CPC classification number: A61M11/02 ,  B81C1/00206 ,  B81C2201/0112 ,  B81C2201/018

Abstract: In a method of producing trench-like depressions (24) in the surface of a wafer (27), particularly a silicon wafer, by plasma etching, in which the depressions (24) are produced by alternate passivation and etching, each depression (24) in its final geometry is provided with a protective layer (30) of the polytetrafluoroethylene type.

Abstract translation: 在通过等离子体蚀刻在晶片（27）表面（特别是硅晶片）的表面中制造沟槽状凹陷（24）的方法中，通过交替的钝化和蚀刻产生凹陷（24），每个凹陷（24 ）在其最终几何形状中设置有聚四氟乙烯类型的保护层（30）。

公开(公告)号：US07846512B2

公开(公告)日：2010-12-07

申请号：US12149367

申请日：2008-04-30

Applicant: Frédéric-Xavier Gaillard ,  Laurent Vandroux

Inventor： Frédéric-Xavier Gaillard ,  Laurent Vandroux

IPC: H05H1/24

CPC classification number: H01L21/0337 ,  B01D67/0034 ,  B01D2325/08 ,  B81B2203/0315 ,  B81B2203/0338 ,  B81C1/00031 ,  B81C2201/018 ,  H01L21/3086 ,  H01L21/7682

Abstract: A method for producing patterns in a polymer layer. Polymer sites are formed on a support. These sites are subjected to a plasma deposition of dielectric material and preferably react with this plasma so as to form openings at the level of said sites. A pattern structure is then formed in the dielectric material and/or in the polymer.

Abstract translation: 聚合物层中图案的制造方法。 聚合物位点形成在载体上。 对这些位置进行电介质材料的等离子体沉积，并优选与该等离子体反应，以在所述位置的水平面上形成开口。 然后在电介质材料和/或聚合物中形成图案结构。