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    Filter circuit
    1.
    发明授权
    Filter circuit 失效
    滤波电路

    公开(公告)号：US06819167B2

    公开(公告)日：2004-11-16

    申请号：US10340595

    申请日：2003-01-13

    Applicant: Yoshikazu Yoshida ,  Akira Yoshida

    Inventor： Yoshikazu Yoshida ,  Akira Yoshida

    IPC: H03K500

    CPC classification number: H03H11/0422

    Abstract: A filter circuit having an input resistance portion including a first transconductor having a positive input port impressed with a first voltage, a negative input port impressed with a second voltage, a positive output port and a negative output port; a second transconductor having a positive input port impressed with the second voltage, a negative input port impressed with a third voltage, a positive output port and a negative output port; and a third transconductor having a positive input port coupled to the positive output ports of the first and second transconductors and the negative output port of the third transconductor, a negative input port coupled to the negative output ports of the first and second transconductors and the positive output port of the third transconductor, a positive output port and a negative output port.

    Abstract translation: 一种滤波器电路，具有输入电阻部分，该输入电阻部分包括具有被加入第一电压的正输入端的第一跨导体，被加压第二电压的负输入端口，正输出端口和负输出端口; 第二跨导体，其具有被施加于第二电压的正输入端;负输入端被第三电压，正输出端和负输出端; 以及第三跨导体，其具有耦合到第一和第二跨导体的正输出端口和第三跨导体的负输出端口的正输入端口，耦合到第一和第二跨导体的负输出端口的负输入端口以及正极输入端口 输出端口，正输出端口和负输出端口。

    Elastic integrated circuit
    2.
    发明授权
    Elastic integrated circuit 失效
    弹性集成电路

    公开(公告)号：US06680990B1

    公开(公告)日：2004-01-20

    申请号：US09578698

    申请日：2000-05-26

    Applicant: Yoshikazu Yoshida ,  Akira Yoshida

    Inventor： Yoshikazu Yoshida ,  Akira Yoshida

    IPC: H04L2540

    CPC classification number: G11C7/22

    Abstract: The present invention provides a simple smaller-sized elastic integrated circuit having a lower power, to which data synchronized with a first clock is input and which outputs data synchronized with a second clock. The elastic integrated circuit includes a read address counter which operates with an internal clock to output a read address count value; a delay circuit to which the read address count value is input and which delays and outputs the read address count value by a predetermined time period; a write address counter which operates using the read address count value output from the delay circuit with a clock externally input so as to output a write address count value; and a memory circuit which writes data input thereto by the write address count value and reads data written therein by the read address count value.

    Abstract translation: 本发明提供了一种具有较低功率的简单的较小尺寸的弹性集成电路，与第一时钟同步的数据被输入到该第一时钟并输出与第二时钟同步的数据。 弹性集成电路包括：读地址计数器，其与内部时钟一起工作以输出读地址计数值; 读取地址计数值被输入的延迟电路，并且将读取地址计数值延迟并输出预定时间段; 写地址计数器，其使用从外部输入的时钟从延迟电路输出的读地址计数值进行操作，以便输出写地址计数值; 以及存储器电路，其通过写入地址计数值写入输入的数据，并读取其中写入的读取地址计数值的数据。

    Active filter circuit with reduced noise
    3.
    发明授权
    Active filter circuit with reduced noise 失效
    有源滤波电路噪声降低

    公开(公告)号：US07009446B2

    公开(公告)日：2006-03-07

    申请号：US09860457

    申请日：2001-05-21

    Applicant: Yoshikazu Yoshida ,  Akira Yoshida

    Inventor： Yoshikazu Yoshida ,  Akira Yoshida

    IPC: H03B1/00

    CPC classification number: H03H11/0444

    Abstract: Input conversion noises of a filter circuit are reduced. The circuit has plural circuit arrangements obtained by dividing the filter circuit so as to include at least one voltage controlled current source, and at least one circuit arrangement is an amplification circuit having an amplifying function for amplifying an input signal to the filter circuit at a set amplification factor. The amplification element circuit has: a loop circuit constructed by plural intra-loop voltage controlled current sources in which mutual conductance values have a predetermined corresponding relation; and a corresponding capacitor connected to a node in the loop circuit and having a capacitance depending on the corresponding relation so as to set a potential at the node to a predetermined potential corresponding to the amplification factor, and amplification element circuit has an electric nature which is independent of the amplification factor when seeing from the input side of the filter circuit.

    Abstract translation: 降低了滤波电路的输入转换噪声。 电路具有通过将滤波电路分压成包含至少一个压控电流而获得的多个电路装置，并且至少一个电路装置是放大电路，具有放大功能，用于放大一组输入信号到滤波电路 放大系数。 放大元件电路具有：由多个环路内受压电流源构成的环路电路，其中互导值具有预定的对应关系; 以及相应的电容器，其连接到环路电路中的节点并且具有取决于相应关系的电容，以便将节点处的电位设置为与放大系数对应的预定电位，并且放大元件电路具有电性质 与从滤波器电路的输入侧观察时的放大系数无关。

    IMAGE FORMING APPARATUS
    6.
    发明申请
    IMAGE FORMING APPARATUS 有权
    图像形成装置

    公开(公告)号：US20150220032A1

    公开(公告)日：2015-08-06

    申请号：US14487741

    申请日：2014-09-16

    Applicant: Nobutaka TAKEUCHI ,  Akira Yoshida

    Inventor： Nobutaka TAKEUCHI ,  Akira Yoshida

    IPC: G03G15/00

    CPC classification number: G03G15/5058 ,  G03G15/5041 ,  G03G15/5054

    Abstract: An image forming apparatus includes an image information acquisition unit that acquires image information; a toner image formation unit that forms, in response to a control parameter, a toner image on a surface of an image carrier based on the image information; an image density detection unit that produces a detection result indicative of image density of the toner image; and a control unit that determines whether to use a predetermined region in the toner image formed on the surface of the image carrier based on the image information for a detection of the image density of the toner image, and when the predetermined region is determined to be used for the detection of the image density, corrects the control parameter used by the toner image formation unit based on the detection result so as to maintain the image density in the predetermined region within a predetermined range.

    Abstract translation: 图像形成装置包括获取图像信息的图像信息获取单元; 调色剂图像形成单元，其响应于控制参数，基于所述图像信息形成图像载体的表面上的调色剂图像; 图像浓度检测单元，其产生指示调色剂图像的图像浓度的检测结果; 以及控制单元，其基于用于检测调色剂图像的图像浓度的图像信息来确定是否使用形成在图像载体的表面上的调色剂图像中的预定区域，并且当确定预定区域为 用于检测图像浓度，基于检测结果校正由调色剂图像形成单元使用的控制参数，以将预定区域中的图像浓度保持在预定范围内。

    Failure detecting apparatus for hydraulic circuit of gearbox
    9.
    发明授权
    Failure detecting apparatus for hydraulic circuit of gearbox 有权
    变速箱液压回路故障检测装置

    公开(公告)号：US08439175B2

    公开(公告)日：2013-05-14

    申请号：US12975374

    申请日：2010-12-22

    Applicant: Tomoaki Ishikawa ,  Koichiro Inukai ,  Akira Yoshida ,  Atsushi Abe ,  Tamaki Sakurai

    Inventor： Tomoaki Ishikawa ,  Koichiro Inukai ,  Akira Yoshida ,  Atsushi Abe ,  Tamaki Sakurai

    IPC: F16H61/12 ,  F16H61/14

    CPC classification number: F16K31/0631 ,  F16H61/12 ,  F16H2061/1208 ,  F16H2061/126 ,  F16H2061/1264 ,  Y10T137/7761 ,  Y10T137/85978

    Abstract: A failure detecting apparatus for a hydraulic circuit of a gearbox includes an operating-state detector. The operating-state detector is configured to detect an operating state of a subject to be controlled with a control-signal pressure output from a solenoid valve. A current setting device is configured to set an electrical current supplied to a solenoid so as to close an output oil passage when a modulator valve is normal and to open the output oil passage when an open failure occurs in the modulator valve, while the solenoid valve is conductive. A failure determining device is configured to detect a failure of the modulator valve when the operating state of the subject to be detected by the operating-state detector is abnormal after a value of the electrical current to be supplied to the solenoid is set at the current setting device.

    Abstract translation: 用于变速箱的液压回路的故障检测装置包括操作状态检测器。 操作状态检测器被配置为通过从电磁阀输出的控制信号压力来检测要控制的对象的操作状态。 电流设定装置被配置为设置供给螺线管的电流，以在调节阀正常时闭合输出油路，并且在调节阀中发生开路故障时打开输出油路，同时电磁阀 是导电的。 故障确定装置被配置为当要提供给螺线管的电流值被设定为当前值时，当操作状态检测器检测到的被检体的操作状态异常时，检测调节阀的故障 设置设备。

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