Root monitoring on an FPGA using satellite ADCs

    公开(公告)号:US11709275B2

    公开(公告)日:2023-07-25

    申请号:US16506064

    申请日:2019-07-09

    申请人: Xilinx, Inc.

    摘要: Systems and methods for monitoring a number of operating conditions of a programmable device are disclosed. In some implementations, the system may include a root monitor including circuitry configured to generate a reference voltage, a plurality of sensors and satellite monitors distributed across the programmable device, and a interconnect system coupled to the root monitor and to each of the plurality of satellite monitors. Each of the satellite monitors may be in a vicinity of and coupled to a corresponding one of the plurality of sensors via a local interconnect. The interconnect system may include one or more analog channels configured to distribute the reference voltage to each of the plurality of satellite monitors, and may include one or more digital channels configured to selectively route digital data from each of the plurality of satellite monitors to the root monitor as data packets.

    Time-multiplexed distribution of analog signals

    公开(公告)号:US11271581B1

    公开(公告)日:2022-03-08

    申请号:US16876174

    申请日:2020-05-18

    申请人: Xilinx, Inc.

    摘要: Method and apparatus for sharing an analog signal for use by a plurality of devices are disclosed. In some implementations, the analog signal may be generated by a controller. The controller also may generate a control signal to determine when other devices use the analog signal. In one implementation, the control signal may be a token that may be transmitted and received by the other devices. If a device possess the token, then the device may use the analog signal. If the device does not possess the token, then the device may not use the analog signal. In another implementation, the controller may transmit a peer-to-peer message to a selected device. When the selected device receives the peer-to-peer message, then the selected device may use the analog signal. In this manner, the controller ensures that only one device at a time may use the analog signal.

    Electro-static discharge (ESD) damage self-test

    公开(公告)号:US11177654B1

    公开(公告)日:2021-11-16

    申请号:US16152011

    申请日:2018-10-04

    申请人: Xilinx, Inc.

    IPC分类号: H02H9/04 H02H1/00 H01L27/02

    摘要: Examples described herein provide a circuit and methods for self-testing to detect damage to a device, which damage may be caused by an Electro-Static Discharge (ESD) event. In an example, an integrated circuit includes an input/output circuit, an ESD protection circuit, and a system monitor. The input/output circuit has an input/output node. The ESD protection circuit is connected to the input/output node. The system monitor has a driving/measurement node selectively connectable to the input/output node. The system monitor is configured to drive and measure a voltage of the driving/measurement node. The system monitor is further configured to determine, based on driving and measuring the voltage of the driving/measurement node, whether a damaged device is present. The damaged device is in the input/output circuit or the ESD protection circuit.

    Thermal load balancing of programmable devices

    公开(公告)号:US11012072B1

    公开(公告)日:2021-05-18

    申请号:US16749707

    申请日:2020-01-22

    申请人: Xilinx, Inc.

    IPC分类号: H03K19/003 H03K19/17704

    摘要: Method and apparatus for monitoring and reconfiguring a programmable device are disclosed. In some implementations, the programmable device may include a processor and a plurality of satellite monitors to determine operating temperatures at various locations throughout the programmable device. When temperatures of at least some of the satellite monitors exceed a threshold, the processor may reconfigure the programmable device using an alternative configuration. The alternative configuration may provide equivalent functionality with respect to an initial configuration through a different arrangement of functional blocks within the programmable device. The new arrangement of functional blocks may reduce operating temperatures by relocating blocks to different regions of the programmable device.

    Programmable temperature coefficient analog second-order curvature compensated voltage reference

    公开(公告)号:US10290330B1

    公开(公告)日:2019-05-14

    申请号:US15832515

    申请日:2017-12-05

    申请人: Xilinx, Inc.

    IPC分类号: G11C5/14 G05F3/24 G01K7/01

    摘要: An example voltage reference circuit includes: a reference circuit comprising a first circuit configured to generate a proportional-to-temperature current and corresponding first control voltage and a second circuit configured to generate a complementary-to-temperature current and corresponding second control voltage; a first current source coupled to a first load circuit, the first current source generating a sum current of the proportional-to-temperature current and the complementary-to-temperature current in response to the first and second control voltages, the first load circuit generating a zero temperature coefficient (Tempco) voltage from the sum current; and a second current source coupled to a second load circuit, the second current source generating the sum current of the proportional-to-temperature current and the complementary-to-temperature current in response to the first and second control voltages, the second load circuit generating a negative Tempco voltage from the sum current and the complementary-to-temperature current.

    Bias current variation correction for complementary metal-oxide-semiconductor (CMOS) temperature sensor

    公开(公告)号:US11181426B1

    公开(公告)日:2021-11-23

    申请号:US16268124

    申请日:2019-02-05

    申请人: Xilinx, Inc.

    摘要: A temperature sensor includes a current source to produce a first bias current and a second bias current, a plurality of diodes, and temperature estimation circuitry. The plurality of diodes includes at least a first diode to receive the first bias current and a second diode to receive the second bias current. The temperature estimate circuitry measures a first voltage bias across the first diode resulting from the first bias current and a second voltage bias across the second diode resulting from the second bias current, and estimates a temperature of an environment of the temperature sensor based at least in part on the first voltage bias and the second voltage bias. The temperature sensor further includes error detection circuitry to measure at least one of the first or second bias currents and determine an amount of error in the temperature estimate based at least in part on the measurement.

    ROOT MONITORING ON AN FPGA USING SATELLITE ADCS

    公开(公告)号:US20210011172A1

    公开(公告)日:2021-01-14

    申请号:US16506064

    申请日:2019-07-09

    申请人: Xilinx, Inc.

    摘要: Systems and methods for monitoring a number of operating conditions of a programmable device are disclosed. In some implementations, the system may include a root monitor including circuitry configured to generate a reference voltage, a plurality of sensors and satellite monitors distributed across the programmable device, and a interconnect system coupled to the root monitor and to each of the plurality of satellite monitors. Each of the satellite monitors may be in a vicinity of and coupled to a corresponding one of the plurality of sensors via a local interconnect. The interconnect system may include one or more analog channels configured to distribute the reference voltage to each of the plurality of satellite monitors, and may include one or more digital channels configured to selectively route digital data from each of the plurality of satellite monitors to the root monitor as data packets.

    Self-biased operational transconductance amplifier-based reference circuit

    公开(公告)号:US10243526B1

    公开(公告)日:2019-03-26

    申请号:US15895829

    申请日:2018-02-13

    申请人: Xilinx, Inc.

    摘要: A device may include a voltage-to-current converter circuit having an operational transconductance amplifier (OTA), the voltage-to-current converter circuit for generating a bias current that is proportional to a reference voltage at a reference voltage input port of the OTA, and a bias current feedback path for providing the bias current to a bias current input port of the OTA. The device may further include a startup current generator circuit coupled to the bias current input port of the OTA, the startup current generator circuit controllable to provide a startup current to the bias current input port during a startup of the device and to be deactivated after the startup of the device.

    Reducing the effect of parasitic mismatch at amplifier inputs
    10.
    发明授权
    Reducing the effect of parasitic mismatch at amplifier inputs 有权
    降低放大器输入端寄生失配的影响

    公开(公告)号:US08902004B2

    公开(公告)日:2014-12-02

    申请号:US13629123

    申请日:2012-09-27

    申请人: Xilinx, Inc.

    IPC分类号: H03F3/45

    摘要: A circuit includes an amplifier including a differential input stage including a first input terminal and a second input terminal. The circuit further includes a differential input line coupled to the first input terminal and the second input terminal, and shielding at least partially encompassing the differential input line. The shielding is connected to a node of the differential input stage of the amplifier.

    摘要翻译: 电路包括放大器,其包括具有第一输入端和第二输入端的差分输入级。 电路还包括耦合到第一输入端和第二输入端的差分输入线,以及至少部分地包围差分输入线的屏蔽。 屏蔽连接到放大器差分输入级的一个节点。