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    FLASH MEMORY DEVICE
    1.
    发明申请
    FLASH MEMORY DEVICE 有权
    闪存存储器件

    公开(公告)号：US20050121716A1

    公开(公告)日：2005-06-09

    申请号：US10726508

    申请日：2003-12-04

    Applicant: Wiley Hill ,  Haihong Wang ,  Yider Wu ,  Bin Yu

    Inventor： Wiley Hill ,  Haihong Wang ,  Yider Wu ,  Bin Yu

    IPC: G11C16/04 ,  H01L21/28 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788

    CPC classification number: H01L21/28273 ,  H01L27/115 ,  H01L27/11556 ,  H01L29/785

    Abstract: A memory device includes a conductive structure, a number of dielectric layers and a control gate. The dielectric layers are formed around the conductive structure and the control gate is formed over the dielectric layers. A portion of the conductive structure functions as a drain region for the memory device and at least one of the dielectric layers functions as a charge storage structure for the memory device. The dielectric layers may include oxide-nitride-oxide layers.

    Abstract translation: 存储器件包括导电结构，多个电介质层和控制栅极。 电介质层形成在导电结构周围，并且控制栅极形成在电介质层上。 导电结构的一部分用作存储器件的漏极区，并且至少一个介电层用作存储器件的电荷存储结构。 电介质层可以包括氧化物 - 氮化物 - 氧化物层。

    Non-volatile memory device
    2.
    发明授权
    Non-volatile memory device 失效
    非易失性存储器件

    公开(公告)号：US06958512B1

    公开(公告)日：2005-10-25

    申请号：US10770010

    申请日：2004-02-03

    Applicant: Yider Wu ,  Shibly S. Ahmed ,  Haihong Wang ,  Bin Yu

    Inventor： Yider Wu ,  Shibly S. Ahmed ,  Haihong Wang ,  Bin Yu

    IPC: H01L21/336 ,  H01L29/423 ,  H01L29/786 ,  H01L29/788

    CPC classification number: H01L29/42324 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7881

    Abstract: A non-volatile memory device includes a substrate, an insulating layer, a fin, a conductive structure and a control gate. The insulating layer may be formed on the substrate and the fin may be formed on the insulating layer. The conductive structure may be formed near a side of the fin and the control gate may be formed over the fin. The conductive structure may act as a floating gate electrode for the non-volatile memory device.

    Abstract translation: 非易失性存储器件包括衬底，绝缘层，鳍，导电结构和控制栅。 绝缘层可以形成在基板上，并且鳍可以形成在绝缘层上。 导电结构可以形成在鳍的一侧附近，并且控制栅可以形成在翅片上。 导电结构可以用作非易失性存储器件的浮栅电极。

    Flash memory device
    3.
    发明授权
    Flash memory device 有权
    闪存设备

    公开(公告)号：US06933558B2

    公开(公告)日：2005-08-23

    申请号：US10726508

    申请日：2003-12-04

    Applicant: Wiley Eugene Hill ,  Haihong Wang ,  Yider Wu ,  Bin Yu

    Inventor： Wiley Eugene Hill ,  Haihong Wang ,  Yider Wu ,  Bin Yu

    IPC: G11C16/04 ,  H01L21/28 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/792

    CPC classification number: H01L21/28273 ,  H01L27/115 ,  H01L27/11556 ,  H01L29/785

    Abstract: A memory device includes a conductive structure, a number of dielectric layers and a control gate. The dielectric layers are formed around the conductive structure and the control gate is formed over the dielectric layers. A portion of the conductive structure functions as a drain region for the memory device and at least one of the dielectric layers functions as a charge storage structure for the memory device. The dielectric layers may include oxide-nitride-oxide layers.

    Abstract translation: 存储器件包括导电结构，多个电介质层和控制栅极。 电介质层形成在导电结构周围，并且控制栅极形成在电介质层上。 导电结构的一部分用作存储器件的漏极区，并且至少一个介电层用作存储器件的电荷存储结构。 电介质层可以包括氧化物 - 氮化物 - 氧化物层。

    Non-volatile memory device
    4.
    发明授权
    Non-volatile memory device 有权
    非易失性存储器件

    公开(公告)号：US06963104B2

    公开(公告)日：2005-11-08

    申请号：US10459576

    申请日：2003-06-12

    Applicant: Yider Wu ,  Bin Yu

    Inventor： Yider Wu ,  Bin Yu

    IPC: H01L21/336 ,  H01L21/8246 ,  H01L27/115 ,  H01L27/12 ,  H01L29/786 ,  H01L29/792 ,  H01L29/788

    CPC classification number: H01L27/11568 ,  H01L27/115 ,  H01L27/1203 ,  H01L29/66833 ,  H01L29/785 ,  H01L29/792

    Abstract: A non-volatile memory device includes a substrate, an insulating layer, a fin, a number of dielectric layers and a control gate. The insulating layer is formed on the substrate and the fin is formed on the insulating layer. The dielectric layers are formed over the fin and the control gate is formed over the dielectric layers. The dielectric layers may include oxide-nitride-oxide layers that function as a charge storage structure for the memory device.

    Abstract translation: 非易失性存储器件包括衬底，绝缘层，鳍片，多个电介质层和控制栅极。 绝缘层形成在基板上，并且鳍形成在绝缘层上。 电介质层形成在鳍片之上，并且控制栅极形成在电介质层上。 电介质层可以包括用作存储器件的电荷存储结构的氧化物 - 氮化物 - 氧化物层。

    FinFET device with multiple fin structures
    5.
    发明授权
    FinFET device with multiple fin structures 有权
    FinFET器件具有多个鳍结构

    公开(公告)号：US07679134B1

    公开(公告)日：2010-03-16

    申请号：US10754515

    申请日：2004-01-12

    Applicant: Matthew S. Buynoski ,  Judy Xilin An ,  Haihong Wang ,  Bin Yu

    Inventor： Matthew S. Buynoski ,  Judy Xilin An ,  Haihong Wang ,  Bin Yu

    IPC: H01L29/94

    CPC classification number: H01L29/785 ,  H01L21/3086 ,  H01L21/3088 ,  H01L21/32139 ,  H01L29/66795

    Abstract: A semiconductor device includes a group of fin structures. The group of fin structures includes a conductive material and is formed by growing the conductive material in an opening of an oxide layer. The semiconductor device further includes a source region formed at one end of the group of fin structures, a drain region formed at an opposite end of the group of fin structures, and at least one gate.

    Abstract translation: 半导体器件包括一组翅片结构。 翅片结构的组包括导电材料，并且通过在氧化物层的开口中生长导电材料而形成。 半导体器件还包括形成在鳍片结构组的一端处的源极区域，形成在鳍片结构组的相对端处的漏极区域和至少一个栅极。

    Varying carrier mobility in semiconductor devices to achieve overall design goals
    7.
    发明授权
    Varying carrier mobility in semiconductor devices to achieve overall design goals 有权
    在半导体器件中改变载波的移动性，实现总体设计目标

    公开(公告)号：US07095065B2

    公开(公告)日：2006-08-22

    申请号：US10633504

    申请日：2003-08-05

    Applicant: Bin Yu ,  Shibly S. Ahmed ,  Haihong Wang

    Inventor： Bin Yu ,  Shibly S. Ahmed ,  Haihong Wang

    IPC: H01L29/80

    CPC classification number: H01L29/785 ,  H01L27/1203 ,  H01L29/42392 ,  H01L29/66795

    Abstract: A semiconductor device may include a substrate and an insulating layer formed on the substrate. A first device may be formed on the insulating layer, including a first fin. The first fin may be formed on the insulating layer and may have a first fin aspect ratio. A second device may be formed on the insulating layer, including a second fin. The second fin may be formed on the insulating layer and may have a second fin aspect ratio different from the first fin aspect ratio.

    Abstract translation: 半导体器件可以包括衬底和形成在衬底上的绝缘层。 第一器件可以形成在绝缘层上，包括第一鳍片。 第一翅片可以形成在绝缘层上，并且可以具有第一翅片长宽比。 第二装置可以形成在绝缘层上，包括第二鳍片。 第二翅片可以形成在绝缘层上，并且可以具有与第一翅片长宽比不同的第二翅片长宽比。

    FULLY SILICIDED GATE STRUCTURE FOR FINFET DEVICES
    8.
    发明申请
    FULLY SILICIDED GATE STRUCTURE FOR FINFET DEVICES 有权
    FINFET器件的完全硅胶结构

    公开(公告)号：US20060177998A1

    公开(公告)日：2006-08-10

    申请号：US11379435

    申请日：2006-04-20

    Applicant: Ming-Ren Lin ,  Witold Maszara ,  Haihong Wang ,  Bin Yu

    Inventor： Ming-Ren Lin ,  Witold Maszara ,  Haihong Wang ,  Bin Yu

    IPC: H01L21/3205

    CPC classification number: H01L29/785 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/7842

    Abstract: A method may include forming a gate electrode over a fin structure, depositing a first metal layer on a top surface of the gate electrode, performing a first silicide process to convert a portion of the gate electrode into a metal-silicide compound, depositing a second metal layer on a top surface of the metal-silicide compound, and performing a second silicide process to form a fully-silicided gate electrode.

    Abstract translation: 一种方法可以包括在鳍结构上形成栅电极，在栅电极的顶表面上沉积第一金属层，执行第一硅化工艺以将栅电极的一部分转化为金属硅化物， 在金属硅化物化合物的顶表面上的金属层，并且执行第二硅化物处理以形成全硅化物栅电极。

    Semiconductor device having a thin fin and raised source/drain areas
    9.
    发明授权
    Semiconductor device having a thin fin and raised source/drain areas 有权
    半导体器件具有薄的鳍片和升高的源极/漏极区域

    公开(公告)号：US06911697B1

    公开(公告)日：2005-06-28

    申请号：US10632965

    申请日：2003-08-04

    Applicant: Haihong Wang ,  Judy Xilin An ,  Bin Yu

    Inventor： Haihong Wang ,  Judy Xilin An ,  Bin Yu

    IPC: H01L21/336 ,  H01L29/423 ,  H01L29/786 ,  H01L27/01 ,  H01L29/76

    CPC classification number: H01L29/785 ,  H01L29/42384 ,  H01L29/66818 ,  H01L29/7855 ,  H01L29/7856 ,  H01L29/78618

    Abstract: A double-gate semiconductor device includes a substrate, an insulating layer, a fin, source and drain regions and a gate. The insulating layer is formed on the substrate and the fin is formed on the insulating layer. The source region is formed on the insulating layer adjacent a first side of the fin and the drain region is formed on the second side of the fin opposite the first side. The source and drain regions have a greater thickness than the fin in the channel region of the semiconductor device.

    Abstract translation: 双栅极半导体器件包括衬底，绝缘层，鳍，源极和漏极区以及栅极。 绝缘层形成在基板上，并且鳍形成在绝缘层上。 源极区域形成在与鳍片的第一侧相邻的绝缘层上，并且漏极区域形成在与第一侧相对的翅片的第二侧上。 源极和漏极区域具有比半导体器件的沟道区域中的鳍片更大的厚度。

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