Memory built-in self test (MBIST) circuitry configured to facilitate production of pre-stressed integrated circuits and methods
    1.
    发明授权
    Memory built-in self test (MBIST) circuitry configured to facilitate production of pre-stressed integrated circuits and methods 有权
    存储器内置自检(MBIST)电路,配置为便于生产预应力集成电路和方法

    公开(公告)号:US08468408B2

    公开(公告)日:2013-06-18

    申请号:US12883450

    申请日:2010-09-16

    IPC分类号: G01R31/28

    摘要: Integrated circuits with memory built-in self test (MBIST) circuitry and methods are disclosed that employ enhanced features. In one aspect of the invention, MBST circuitry is used set memory elements of arrays to a first state and then to an inverse state during a burn-in operation to maintain each of the two opposing states for a desired time in order to either force a failure of the integrated circuit component or produce a pre-stressed component beyond an infancy stage. Preferably, an integrated circuit is provided having MIBST circuitry configured to serially test multiple arrays of memory elements within a component of the integrated circuit and to also conduct parallel initialization of the serially tested arrays.

    摘要翻译: 具有存储器内置自检(MBIST)电路和方法的集成电路被公开,其采用增强的特征。 在本发明的一个方面中,使用MBST电路将阵列的存储器元件设置为第一状态,然后在老化操作期间处于反向状态,以将两个相对状态中的每一个保持期望的时间,以便强制a 集成电路部件故障或产生超过初级阶段的预应力部件。 优选地,提供具有MIBST电路的集成电路,其被配置为串行测试集成电路的部件内的多个存储元件阵列,并且还对串行测试阵列进行并行初始化。

    Integrated circuit with memory built-in self test (MBIST) circuitry having enhanced features and methods
    2.
    发明授权
    Integrated circuit with memory built-in self test (MBIST) circuitry having enhanced features and methods 有权
    具有内存自检(MBIST)电路的集成电路具有增强的特性和方法

    公开(公告)号:US08423846B2

    公开(公告)日:2013-04-16

    申请号:US12883441

    申请日:2010-09-16

    IPC分类号: G01R31/28

    摘要: Integrated circuits with memory built-in self test (MBIST) circuitry and methods are disclosed that employ enhanced features. In one aspect of the invention, an integrated circuit is provided having MIBST circuitry configured to serially test multiple arrays of memory elements within a component of the integrated circuit and to also conduct parallel initialization of the serially tested arrays. In another aspect of the invention, the MBST circuitry is used set the memory elements of the arrays to a first state and then to an inverse state during a burn-in operation to maintain each of the two opposing states for a desired time in order to either force a failure of the integrated circuit component or produce a pre-stressed component beyond an infancy stage.

    摘要翻译: 具有存储器内置自检(MBIST)电路和方法的集成电路被公开,其采用增强的特征。 在本发明的一个方面,提供了一种集成电路,其具有MBIST电路,其被配置为串行测试集成电路的部件内的多个存储元件阵列,并且还对串行测试阵列进行并行初始化。 在本发明的另一方面,使用MBIST电路将阵列的存储元件设置为第一状态,然后在老化操作期间将其置于反向状态,以将两个相对状态中的每一个保持期望的时间,以便 要么强制集成电路部件的故障或者产生超过初级阶段的预应力部件。

    INTEGRATED CIRCUIT WITH MEMORY BUILT-IN SELF TEST (MBIST) CIRCUITRY HAVING ENHANCED FEATURES AND METHODS
    3.
    发明申请
    INTEGRATED CIRCUIT WITH MEMORY BUILT-IN SELF TEST (MBIST) CIRCUITRY HAVING ENHANCED FEATURES AND METHODS 有权
    集成电路与存储器内置自检(MBIST)具有增强特性和方法的电路

    公开(公告)号:US20120072788A1

    公开(公告)日:2012-03-22

    申请号:US12883441

    申请日:2010-09-16

    IPC分类号: G11C29/36 G06F11/27

    摘要: Integrated circuits with memory built-in self test (MBIST) circuitry and methods are disclosed that employ enhanced features. In one aspect of the invention, an integrated circuit is provided having MIBST circuitry configured to serially test multiple arrays of memory elements within a component of the integrated circuit and to also conduct parallel initialization of the serially tested arrays. In another aspect of the invention, the MBST circuitry is used set the memory elements of the arrays to a first state and then to an inverse state during a burn-in operation to maintain each of the two opposing states for a desired time in order to either force a failure of the integrated circuit component or produce a pre-stressed component beyond an infancy stage.

    摘要翻译: 具有存储器内置自检(MBIST)电路和方法的集成电路被公开,其采用增强的特征。 在本发明的一个方面,提供了一种集成电路,其具有MBIST电路,其被配置为串行测试集成电路的部件内的多个存储元件阵列,并且还对串行测试阵列进行并行初始化。 在本发明的另一方面,使用MBIST电路将阵列的存储元件设置为第一状态,然后在老化操作期间将其置于反向状态,以将两个相对状态中的每一个保持期望的时间,以便 要么强制集成电路部件的故障或者产生超过初级阶段的预应力部件。

    MEMORY BUILT-IN SELF TEST (MBIST) CIRCUITRY CONFIGURED TO FACILITATE PRODUCTION OF PRE-STRESSED INTEGRATED CIRCUITS AND METHODS
    4.
    发明申请
    MEMORY BUILT-IN SELF TEST (MBIST) CIRCUITRY CONFIGURED TO FACILITATE PRODUCTION OF PRE-STRESSED INTEGRATED CIRCUITS AND METHODS 有权
    内存自检(MBIST)电路配置,以便于生产预应力集成电路和方法

    公开(公告)号:US20120072789A1

    公开(公告)日:2012-03-22

    申请号:US12883450

    申请日:2010-09-16

    IPC分类号: G11C29/12 G06F11/00

    摘要: Integrated circuits with memory built-in self test (MBIST) circuitry and methods are disclosed that employ enhanced features. In one aspect of the invention, MBST circuitry is used set memory elements of arrays to a first state and then to an inverse state during a burn-in operation to maintain each of the two opposing states for a desired time in order to either force a failure of the integrated circuit component or produce a pre-stressed component beyond an infancy stage. Preferably, an integrated circuit is provided having MIBST circuitry configured to serially test multiple arrays of memory elements within a component of the integrated circuit and to also conduct parallel initialization of the serially tested arrays.

    摘要翻译: 具有存储器内置自检(MBIST)电路和方法的集成电路被公开,其采用增强的特征。 在本发明的一个方面中,使用MBST电路将阵列的存储器元件设置为第一状态,然后在老化操作期间处于反向状态,以将两个相对状态中的每一个保持期望的时间,以便强制a 集成电路部件故障或产生超过初级阶段的预应力部件。 优选地,提供具有MIBST电路的集成电路,其被配置为串行测试集成电路的部件内的多个存储元件阵列,并且还对串行测试阵列进行并行初始化。

    Enabling virtual calls in a SIMD environment
    6.
    发明授权
    Enabling virtual calls in a SIMD environment 有权
    在SIMD环境中启用虚拟呼叫

    公开(公告)号:US09183014B2

    公开(公告)日:2015-11-10

    申请号:US13028574

    申请日:2011-02-16

    摘要: Systems and methods of enabling virtual calls in a single instruction multiple data (SIMD) environment may involve detecting a virtual call of a function and using a single dispatch of the function to invoke the virtual call for two or more channels of the virtual call. In one example, it is determined that the two or more channels share a common target address and a single dispatch of the function is conducted with respect to the common target address. The process may be iterated for additional channels of the virtual call that share a common target address.

    摘要翻译: 在单个指令多数据(SIMD)环境中启用虚拟呼叫的系统和方法可以涉及检测功能的虚拟呼叫,并且使用该功能的单个调度来调用虚拟呼叫的两个或多个信道的虚拟呼叫。 在一个示例中,确定两个或更多个信道共享公共目标地址,并且相对于公共目标地址进行该功能的单个调度。 可以对共享共同目标地址的虚拟呼叫的附加信道重复该过程。

    Capturing lens system
    8.
    发明授权
    Capturing lens system 有权
    捕捉镜头系统

    公开(公告)号:US08797658B2

    公开(公告)日:2014-08-05

    申请号:US13488636

    申请日:2012-06-05

    IPC分类号: G02B3/02 G02B13/18 G02B13/00

    CPC分类号: G02B13/0035

    摘要: This invention provides a capturing lens system in order from an object side to an image side comprising: a first lens element with positive refractive power; a plastic second lens element with negative refractive power having a concave object-side surface and a convex image-side surface, both the object-side and image-side surfaces thereof being aspheric; and a plastic third lens element with positive refractive power having a convex object-side surface and a concave image-side surface, both the object-side and image-side surfaces thereof being aspheric, and at least one inflection point is formed on at least one of the object-side and image-side surfaces thereof. Additionally, the central thickness of the second lens element is controlled favorably for the efficient spatial arrangement of the lens assembly and the simpler individual lens production while assuring suitable thickness of the second lens element, thereby assuring high image quality and improving yield rate of the product.

    摘要翻译: 本发明提供一种从物体侧到图像侧的顺序的拍摄透镜系统,包括:具有正折射力的第一透镜元件; 具有负折射力的塑料第二透镜元件具有凹面物侧表面和凸像侧表面,其物侧和像侧表面均为非球面; 以及具有正折射力的塑料第三透镜元件,具有凸面物侧表面和凹像侧面,其物侧和像侧表面均为非球面,并且至少形成至少一个拐点 其物体侧和像侧表面之一。 此外,第二透镜元件的中心厚度被有利地控制用于透镜组件的有效空间布置和更简单的单个透镜生产,同时确保第二透镜元件的合适厚度,从而确保高图像质量并提高产品的屈服率 。

    Imaging optical lens system
    10.
    发明授权
    Imaging optical lens system 有权
    成像光学透镜系统

    公开(公告)号:US08649114B2

    公开(公告)日:2014-02-11

    申请号:US13586334

    申请日:2012-08-15

    IPC分类号: G02B9/12 G02B3/02 G02B13/18

    CPC分类号: G02B13/0035

    摘要: This invention provides an imaging optical lens system comprising three lens elements with refractive power: a positive first lens element having a convex object-side surface at a paraxial region; a negative plastic second lens element having a convex or flat object-side surface and a concave image-side surface at a paraxial region, and both the object-side surface and the image-side surface being aspheric; and a negative plastic third lens element having a concave object-side surface at a paraxial region, the shape of the image-side surface thereof changing from concave when near an optical axis to convex when away from the optical axis, and both the object-side surface and the image-side surface being aspheric. The aforesaid arrangement can not only effectively correct the astigmatism of the system against defocus problems but also effectively reduce the back focal length for desirable space usage. Therefore, the lens system can be more compact.

    摘要翻译: 本发明提供了一种成像光学透镜系统,其包括具有屈光力的三个透镜元件:正的第一透镜元件,其在近轴区域具有凸的物体侧表面; 在近轴区域具有凸形或平坦物体侧表面和凹形图像侧表面的负塑料第二透镜元件,物体侧表面和像侧表面均为非球面; 以及在近轴区域具有凹形物侧表面的负塑料第三透镜元件,当远离光轴时,像侧表面的形状从靠近光轴的凹部变为凸形, 侧面和图像侧表面是非球面的。 上述布置不仅可以有效地校正系统散焦问题的散光,还能有效地减少理想空间使用的后焦距。 因此,透镜系统可以更紧凑。