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公开(公告)号：US11448932B2
公开(公告)日：2022-09-20
申请号：US16476292
申请日：2019-04-16
Inventor： Yuan Yan , Jiyue Song
IPC: H01L21/3205 , G02F1/1362 , H01L21/3213 , H01L21/324
Abstract: An array substrate and a manufacturing method thereof in the embodiment of the present invention can complete the process of the array substrate with the touch function by using six photolithography processes, thereby simplifying the production process, saving cost, and shortening the production cycle.
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公开(公告)号：US11869895B2
公开(公告)日：2024-01-09
申请号：US16311693
申请日：2018-11-01
Inventor： Yuan Yan
CPC classification number: H01L27/1214 , G06F3/0412 , G06F3/0421 , G06V40/13 , G06V40/1318 , H01L27/1251 , H01L31/0284 , H01L31/10 , G06F2203/04103 , G06F2203/04107
Abstract: A display panel and a manufacturing method thereof are provided. The display panel comprises a glass substrate, an insulating layer, a polysilicon layer, a gate insulating layer, a gate layer, an interlayer insulating layer, and a source-drain contacting layer, wherein the polysilicon layer is defined with a first doped region, a second doped region, and a third doped region. The source-drain contacting layer contacts the first doped region and the third doped region. A doping type of the first doped region and a doping type of the third doped region are different so that the first doped region and the third doped region form a PN structure. Doping type of the first doped region and a doping type of the second doped region are same.
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公开(公告)号：US11307468B2
公开(公告)日：2022-04-19
申请号：US16754332
申请日：2019-11-11
Inventor： Yuan Yan , Yong Xu , Dewei Song , Fei Ai
IPC: G02F1/1362 , H01L27/12 , G02F1/1333 , G06F3/041 , G02F1/1343
Abstract: The present disclosure provides an array substrate and a manufacturing method of the array substrate. The method includes sequentially forming an active layer and an insulating layer on a substrate; forming a common electrode layer and a first metal layer on the insulating layer using a same photomask, wherein the common electrode layer includes touch electrodes; and forming a second metal layer on the pixel electrode layer, wherein the second metal layer includes touch signal lines, and the touch signal lines electrically are electrically connected to the touch electrodes.
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公开(公告)号：US20220004066A1
公开(公告)日：2022-01-06
申请号：US16754332
申请日：2019-11-11
Inventor： Yuan Yan , Yong Xu , Dewei Song , Fei Ai
IPC: G02F1/1362 , H01L27/12 , G02F1/1343 , G02F1/1333 , G06F3/041
Abstract: The present disclosure provides an array substrate and a manufacturing method of the array substrate. The method includes sequentially forming an active layer and an insulating layer on a substrate; forming a common electrode layer and a first metal layer on the insulating layer using a same photomask, wherein the common electrode layer includes touch electrodes; and forming a second metal layer on the pixel electrode layer, wherein the second metal layer includes touch signal lines, and the touch signal lines electrically are electrically connected to the touch electrodes.
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公开(公告)号：US10884273B1
公开(公告)日：2021-01-05
申请号：US16642029
申请日：2019-11-07
Inventor： Juncheng Xiao , Fei Ai , Yuan Yan
IPC: G02F1/133 , G02F1/1333 , G02F1/1362
Abstract: A display panel and a display device are provided, which the display panel including a display substrate, a counter substrate, and a backlight. The display substrate includes a first thin film transistor layer, a touch electrode, and a pixel definition layer. The substrate includes a second thin film transistor layer and a photosensitive component. The second thin film transistor layer has a plurality of thin film transistors. The photosensitive component is connected to an underside of the second thin film transistor layer. The photosensitive component receives a reflected light of a user's fingerprint to identify an identification of the user.
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Patent Agency Ranking
公开(公告)号：US11018165B2
公开(公告)日：2021-05-25
申请号：US16641663
申请日：2019-11-06
Abstract: A manufacturing method of an array substrate and the array substrate are provided. The method comprises: forming an active layer on a substrate; forming an insulation layer on the active layer; forming a first metal layer on the insulation layer; forming an interlayer dielectric layer and a pixel electrode layer on the first metal layer by a same mask; forming a second metal layer on the interlayer dielectric layer, wherein the second metal layer comprises a source electrode, a drain electrode, and a touch signal line; and forming a patterned protective layer and a patterned common electrode layer on the second metal layer.
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公开(公告)号：US10896921B2
公开(公告)日：2021-01-19
申请号：US16086041
申请日：2018-08-01
Inventor： Guanghui Liu , Xin Zhang , Yuan Yan
IPC: H01L27/12 , G02F1/1343 , H01L29/786 , H01L29/66 , G02F1/1333 , G06F3/041
Abstract: A manufacturing method of a display panel is provided and includes providing a substrate; and forming a buffer layer, a polysilicon layer, a gate electrode, an interlayer insulating layer, a first transparent electrode layer, a source electrode and drain electrode line, and a touch control line on the substrate in sequence. A masking process is omitted using a planarization layer as a photoresist layer of the interlayer insulating layer. One more masking process is omitted by forming the pixel electrode, the source electrode and drain electrode line and the touch control line in a same masking process.
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公开(公告)号：US11521993B2
公开(公告)日：2022-12-06
申请号：US16323523
申请日：2018-09-25
Inventor： Chao Wang , Guanghui Liu , Yuan Yan
IPC: H01L27/12 , G02F1/1362 , G02F1/1343
Abstract: A display panel and method of manufacturing the same are provided. The method of manufacturing the display panel includes the steps of providing a substrate, forming a gate on the substrate, forming a gate insulating layer on the gate and the substrate, forming a polysilicon layer on the gate insulating layer, performing a first gray-scale mask process on the polysilicon layer to form a source region, a drain region and an active region located between the source region and the drain region by the polysilicon layer, forming an interlayer dielectric layer on the gate insulating layer and the polysilicon layer, forming a first electrode layer on the interlayer dielectric layer, performing a second gray-scale mask process on the first electrode layer and the interlayer dielectric layer.
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公开(公告)号：US20210098582A1
公开(公告)日：2021-04-01
申请号：US16097838
申请日：2018-09-14
Inventor： Yuan Yan , Lisheng Li , Dewei Song
IPC: H01L29/417 , H01L29/66 , H01L29/786 , H01L27/12
Abstract: The present invention teaches a TFT substrate manufacturing method and a TFT substrate. The method configures contact region vias in the source/drain contact regions at two ends of the active layer, provides buffer layer troughs in the buffer layer beneath the contact region vias, and forms undercut structure between the buffer layer troughs and the active layer around the contact region vias, thereby separating the transparent conductive layer at the contact region vias, and extending the source/drain electrodes to contact the source/drain contact regions of the active layer from below through the buffer layer troughs. The present invention therefore prevents the occurrence of Schottky contact barrier resulted from the contact between poly-Si and ITO in the 7-mask process by letting the source/drain electrodes to directly contact and form ohmic contact with the source/drain contact regions of the active layer, thereby enhancing the electronic mobility of TFT devices.
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公开(公告)号：US12068330B2
公开(公告)日：2024-08-20
申请号：US16966116
申请日：2020-01-17
Inventor： Yuan Yan , Yong Xu , Fei Ai , Dewei Song
CPC classification number: H01L27/124 , G06F3/041 , G06F3/0412 , G06F3/04164 , G06F3/0443 , H01L27/1288 , G06F2203/04103
Abstract: A touch array substrate and a manufacturing method thereof, wherein in the touch array substrate, an active layer, an insulating layer, a pixel electrode layer, a metal layer, a planarization layer, and a common electrode layer are sequentially disposed on the buffer layer. The active layer includes a first region corresponding to a source electrode and a second region corresponding to a drain electrode. The pixel electrode layer includes a plurality of base layers. The metal layer is correspondingly disposed on the base layers. The metal layer includes a touch signal line, a data line, and a gate electrode. The common electrode layer includes a touch electrode, the source electrode, and the drain electrode.
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