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    SEMICONDUCTOR STRUCTURE WITH A MULTILAYER GATE OXIDE AND METHOD OF FABRICATING THE SAME
    1.
    发明申请
    SEMICONDUCTOR STRUCTURE WITH A MULTILAYER GATE OXIDE AND METHOD OF FABRICATING THE SAME 有权
    具有多层栅氧化物的半导体结构及其制造方法

    公开(公告)号：US20160225872A1

    公开(公告)日：2016-08-04

    申请号：US14609446

    申请日：2015-01-30

    Applicant: United Microelectronics Corp.

    Inventor： Shao-Wei Wang ,  Shu-Ming Yeh ,  Yu-Tung Hsiao

    IPC: H01L29/51 ,  H01L29/66 ,  H01L21/3105 ,  H01L29/423 ,  H01L21/02

    CPC classification number: H01L29/513 ,  H01L21/28167 ,  H01L29/517 ,  H01L29/66545

    Abstract: A semiconductor structure with a multilayer gate oxide is provided. The structure includes a substrate. A multilayer gate oxide is disposed on the substrate, wherein the multilayer gate oxide includes a first gate oxide and a second gate oxide. The first gate oxide contacts the substrate and the second gate oxide is disposed on and contacts the first gate oxide. The second gate oxide is hydrophilic. The first gate oxide is formed by a thermal oxidation process. The second gate oxide is formed by a chemical treatment.

    Abstract translation: 提供具有多层栅极氧化物的半导体结构。 该结构包括基底。 多层栅极氧化物设置在基板上，其中多层栅极氧化物包括第一栅极氧化物和第二栅极氧化物。 第一栅极氧化物接触衬底，并且第二栅极氧化物设置在第一栅极氧化物上并与其接触。 第二栅极氧化物是亲水的。 第一栅极氧化物通过热氧化工艺形成。 第二栅极氧化物通过化学处理形成。

    Semiconductor structure with a multilayer gate oxide and method of fabricating the same
    2.
    发明授权
    Semiconductor structure with a multilayer gate oxide and method of fabricating the same 有权
    具有多层栅极氧化物的半导体结构及其制造方法

    公开(公告)号：US09406772B1

    公开(公告)日：2016-08-02

    申请号：US14609446

    申请日：2015-01-30

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Shao-Wei Wang ,  Shu-Ming Yeh ,  Yu-Tung Hsiao

    IPC: H01L29/76 ,  H01L29/51 ,  H01L29/423 ,  H01L21/02 ,  H01L21/3105 ,  H01L29/66

    CPC classification number: H01L29/513 ,  H01L21/28167 ,  H01L29/517 ,  H01L29/66545

    Abstract: A semiconductor structure with a multilayer gate oxide is provided. The structure includes a substrate. A multilayer gate oxide is disposed on the substrate, wherein the multilayer gate oxide includes a first gate oxide and a second gate oxide. The first gate oxide contacts the substrate and the second gate oxide is disposed on and contacts the first gate oxide. The second gate oxide is hydrophilic. The first gate oxide is formed by a thermal oxidation process. The second gate oxide is formed by a chemical treatment.

    Abstract translation: 提供具有多层栅极氧化物的半导体结构。 该结构包括基底。 多层栅极氧化物设置在基板上，其中多层栅极氧化物包括第一栅极氧化物和第二栅极氧化物。 第一栅极氧化物接触衬底，并且第二栅极氧化物设置在第一栅极氧化物上并与其接触。 第二栅极氧化物是亲水的。 第一栅极氧化物通过热氧化工艺形成。 第二栅极氧化物通过化学处理形成。

    Method for forming a stacked layer structure
    4.
    发明授权
    Method for forming a stacked layer structure 有权
    堆叠层结构的形成方法

    公开(公告)号：US09418853B1

    公开(公告)日：2016-08-16

    申请号：US14692736

    申请日：2015-04-21

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Shao-Wei Wang ,  Keng-Jen Lin ,  Yu-Tung Hsiao ,  Shu-Ming Yeh

    IPC: H01L21/3205 ,  H01L21/28 ,  H01L29/51

    CPC classification number: H01L21/28185 ,  H01L21/28088 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518 ,  H01L29/66545 ,  H01L29/66795

    Abstract: The present invention provides a method for forming a stacked layer structure, including: first, a recess is provided, next, an oxide layer is formed in the recess, where the oxide layer has a thickness T1, a high-k layer is formed on the oxide layer, a barrier layer is formed on the high-k layer, a silicon layer is then formed on the barrier layer, afterwards, an annealing process is performed on the silicon layer, so as to form an oxygen-containing layer between the silicon layer and the barrier layer, where the oxide layer has a thickness T2 after the annealing process is performed, and satisfies the relationship: (T2−T1)/T1≦0.05, and the silicon layer and the oxygen-containing layer are removed.

    Abstract translation: 本发明提供一种层叠结构体的形成方法，其特征在于，首先，设置凹部，在所述凹部形成有氧化层，其中氧化物层的厚度为T1，高k层形成在 氧化物层，在高k层上形成阻挡层，然后在阻挡层上形成硅层，然后在硅层上进行退火处理，以在其之间形成含氧层 硅层和阻挡层，其中氧化物层在退火处理之后具有厚度T2，并且满足关系：（T2-T1）/T1≤0.05，并且去除硅层和含氧层。

    Semiconductor process
    6.
    发明授权
    Semiconductor process 有权
    半导体工艺

    公开(公告)号：US09449829B1

    公开(公告)日：2016-09-20

    申请号：US14705960

    申请日：2015-05-06

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Yu-Tung Hsiao ,  Chien-Liang Lin ,  Yu-Ren Wang

    IPC: H01L21/28 ,  H01L29/51 ,  H01L29/49

    CPC classification number: H01L29/4966 ,  H01L21/28088 ,  H01L21/28202 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545

    Abstract: A semiconductor process includes the following steps. A dielectric layer is formed on a substrate. A barrier layer is formed on the dielectric layer. An ammonia thermal treatment process with a processing temperature of 650° C.˜700° C. and a nitrogen containing gas annealing process with a processing temperature of 900° C.˜1000° C. are sequentially performed on the barrier layer. The present invention also provides a semiconductor process including the following steps. A dielectric layer is formed on a substrate. A first nitrogen containing thermal treatment process is performed on the dielectric layer. A barrier layer is formed on the dielectric layer. A second nitrogen containing thermal treatment process and then an annealing process are performed in-situ on the barrier layer.

    Abstract translation: 半导体工艺包括以下步骤。 在基板上形成电介质层。 在电介质层上形成阻挡层。 在阻挡层上依次进行处理温度为650℃〜700℃的氨热处理工序和处理温度为900℃〜1000℃的含氮气体退火处理。 本发明还提供一种包括以下步骤的半导体工艺。 在基板上形成电介质层。 在介电层上进行第一含氮热处理工艺。 在电介质层上形成阻挡层。 在阻挡层上原位进行第二种含氮热处理工艺，然后进行退火处理。

    Manufacturing method of semiconductor structure
    9.
    发明授权
    Manufacturing method of semiconductor structure 有权
    半导体结构的制造方法

    公开(公告)号：US09356125B1

    公开(公告)日：2016-05-31

    申请号：US14810500

    申请日：2015-07-28

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Yu-Tung Hsiao ,  Keng-Jen Lin ,  Yu-Ren Wang

    IPC: H01L29/66 ,  H01L21/02 ,  H01L21/31 ,  H01L21/324 ,  H01L29/06 ,  H01L21/00

    CPC classification number: H01L29/66795 ,  H01L29/0653

    Abstract: A manufacturing method of a semiconductor structure includes the following steps. A high-k dielectric layer is formed on a semiconductor substrate, and a barrier layer is formed on the high-k dielectric layer. An oxygen annealing treatment is performed after the step of forming the barrier layer; and a capping layer is formed on the barrier layer after the oxygen annealing treatment.

    Abstract translation: 半导体结构的制造方法包括以下步骤。 在半导体衬底上形成高k电介质层，在高k电介质层上形成阻挡层。 在形成阻挡层的步骤之后进行氧退火处理; 在氧退火处理后在阻挡层上形成覆盖层。

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