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公开(公告)号:US20240332086A1
公开(公告)日:2024-10-03
申请号:US18739261
申请日:2024-06-10
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yi-Fan Li , Po-Ching Su , Yu-Fu Wang , Min-Hua Tsai , Ti-Bin Chen , Chih-Chiang Wu , Tzu-Chin Wu
IPC: H01L21/8234 , H01L29/423 , H01L29/78
CPC classification number: H01L21/823437 , H01L21/823462 , H01L21/823481 , H01L29/4232 , H01L29/78
Abstract: A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a spacer around the metal gate, and a first interlayer dielectric (ILD) layer around the spacer, performing a plasma treatment process to transform the spacer into a first bottom portion and a first top portion, performing a cleaning process to remove the first top portion, and forming a second ILD layer on the metal gate and the first ILD layer.
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公开(公告)号:US12040234B2
公开(公告)日:2024-07-16
申请号:US17393387
申请日:2021-08-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yi-Fan Li , Po-Ching Su , Yu-Fu Wang , Min-Hua Tsai , Ti-Bin Chen , Chih-Chiang Wu , Tzu-Chin Wu
IPC: H01L29/49 , H01L21/8234 , H01L29/423 , H01L29/78
CPC classification number: H01L21/823437 , H01L21/823462 , H01L21/823481 , H01L29/4232 , H01L29/78
Abstract: A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a spacer around the metal gate, and a first interlayer dielectric (ILD) layer around the spacer, performing a plasma treatment process to transform the spacer into a first bottom portion and a first top portion, performing a cleaning process to remove the first top portion, and forming a second ILD layer on the metal gate and the first ILD layer.
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公开(公告)号:US20200006517A1
公开(公告)日:2020-01-02
申请号:US16053665
申请日:2018-08-02
Applicant: United Microelectronics Corp.
Inventor: Yi-Fan Li , Po-Ching Su , Cheng-Chia Liu , Yen-Tsai Yi , Wei-Chuan Tsai , Chih-Chiang Wu , Ti-Bin Chen , Ching-Chu Tseng
Abstract: A structure of semiconductor device includes a gate structure, disposed on a substrate. A spacer is disposed on a sidewall of the gate structure, wherein the spacer is an l-like structure. A first doped region is disposed in the substrate at two sides of the gate structure. A second doped region is disposed in the substrate at the two sides of the gate structure, overlapping the first doped region. A silicide layer is disposed on the substrate within the second doped region, separating from the spacer by a distance. A dielectric layer covers over the second doped region and the gate structure with the spacer.
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公开(公告)号:US20160306912A1
公开(公告)日:2016-10-20
申请号:US14690481
申请日:2015-04-20
Applicant: United Microelectronics Corp.
Inventor: Yen-Hung Chen , Chin-Lung Lin , Kuan-Wen Fang , Po-Ching Su , Hung-Wei Lin , Sheng-Lung Teng , Lun-Wen Yeh
IPC: G06F17/50 , H01L21/768 , G03F1/36
CPC classification number: G06F17/5081 , G03F1/36 , H01L21/76807
Abstract: An optical proximity correction (OPC) process is provided. The method comprising receiving a first pattern corresponding to a first structure of a semiconductor structure, and a second pattern corresponding to a second structure of said semiconductor structure. Next, a first OPC process is performed for the first pattern to obtain a revised first pattern, wherein the revised first pattern has a first shift regarding to the first pattern. A second OPC process is performed for the second pattern to obtain a revised second pattern, wherein the second OPC process comprises moving the second pattern according to the first shift.
Abstract translation: 提供光学邻近校正(OPC)过程。 该方法包括接收对应于半导体结构的第一结构的第一图案,以及对应于所述半导体结构的第二结构的第二图案。 接下来,对第一图案执行第一OPC处理以获得修改的第一图案,其中修改的第一图案具有关于第一图案的第一移位。 对第二图案执行第二OPC处理以获得修订的第二图案,其中第二OPC处理包括根据第一移位移动第二图案。
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公开(公告)号:US20240332087A1
公开(公告)日:2024-10-03
申请号:US18739286
申请日:2024-06-10
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yi-Fan Li , Po-Ching Su , Yu-Fu Wang , Min-Hua Tsai , Ti-Bin Chen , Chih-Chiang Wu , Tzu-Chin Wu
IPC: H01L21/8234 , H01L29/423 , H01L29/78
CPC classification number: H01L21/823437 , H01L21/823462 , H01L21/823481 , H01L29/4232 , H01L29/78
Abstract: A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a spacer around the metal gate, and a first interlayer dielectric (ILD) layer around the spacer, performing a plasma treatment process to transform the spacer into a first bottom portion and a first top portion, performing a cleaning process to remove the first top portion, and forming a second ILD layer on the metal gate and the first ILD layer.
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公开(公告)号:US20230005795A1
公开(公告)日:2023-01-05
申请号:US17393387
申请日:2021-08-03
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yi-Fan Li , Po-Ching Su , Yu-Fu Wang , Min-Hua Tsai , Ti-Bin Chen , Chih-Chiang Wu , Tzu-Chin Wu
IPC: H01L21/8234 , H01L29/78 , H01L29/423
Abstract: A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a spacer around the metal gate, and a first interlayer dielectric (ILD) layer around the spacer, performing a plasma treatment process to transform the spacer into a first bottom portion and a first top portion, performing a cleaning process to remove the first top portion, and forming a second ILD layer on the metal gate and the first ILD layer.
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公开(公告)号:US09563738B2
公开(公告)日:2017-02-07
申请号:US14690481
申请日:2015-04-20
Applicant: UNITED MICROELECTRONICS CORP.
Inventor: Yen-Hung Chen , Chin-Lung Lin , Kuan-Wen Fang , Po-Ching Su , Hung-Wei Lin , Sheng-Lung Teng , Lun-Wen Yeh
IPC: G06F17/50 , G03F1/36 , H01L21/768
CPC classification number: G06F17/5081 , G03F1/36 , H01L21/76807
Abstract: An optical proximity correction (OPC) process is provided. The method comprising receiving a first pattern corresponding to a first structure of a semiconductor structure, and a second pattern corresponding to a second structure of said semiconductor structure. Next, a first OPC process is performed for the first pattern to obtain a revised first pattern, wherein the revised first pattern has a first shift regarding to the first pattern. A second OPC process is performed for the second pattern to obtain a revised second pattern, wherein the second OPC process comprises moving the second pattern according to the first shift.
Abstract translation: 提供光学邻近校正(OPC)过程。 该方法包括接收对应于半导体结构的第一结构的第一图案,以及对应于所述半导体结构的第二结构的第二图案。 接下来,对第一图案执行第一OPC处理以获得修改的第一图案,其中修改的第一图案具有关于第一图案的第一移位。 对第二图案执行第二OPC处理以获得修订的第二图案,其中第二OPC处理包括根据第一移位移动第二图案。
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