公开(公告)号：US20220013653A1

公开(公告)日：2022-01-13

申请号：US16926258

申请日：2020-07-10

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Yi-Ruei Jhan ,  Kuan-Ting Pan ,  Kuo-Cheng Chiang ,  Kuan-Lun Cheng ,  Chih-Hao Wang

IPC: H01L29/66 ,  H01L29/78 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/165

Abstract: A semiconductor device includes a first active fin structure and a second active fin structure extending along a first lateral direction. The semiconductor device includes a dummy fin structure, also extending along the first lateral direction, that is disposed between the first active fin structure and the second fin structure. The dummy fin structure includes a material that is configured to induce mechanical deformation of a first source/drain structure coupled to an end of the first active fin structure and a second source/drain structure coupled to an end of the second active fin structure.

公开(公告)号：US11217676B1

公开(公告)日：2022-01-04

申请号：US16910120

申请日：2020-06-24

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Che-Chen Wu ,  Kuo-Cheng Chiang ,  Chih-Hao Wang ,  Jia-Chuan You ,  Li-Yang Chuang

IPC: H01L21/311 ,  H01L21/3213 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

Abstract: A gate-all-around field effect transistor may be provided by forming a sacrificial gate structure and a dielectric gate spacer around a middle portion of a semiconductor plate stack. A source region and a drain region may be formed on end portions of semiconductor plates within the semiconductor plate stack. The sacrificial gate structure and other sacrificial material portions may be replaced with a combination of a gate dielectric layer and a gate electrode. The gate dielectric layer and the gate electrode may be vertically recessed selective to the dielectric gate spacer. A first anisotropic etch process recesses the gate electrode and the gate dielectric layer at about the same etch rate. A second anisotropic etch process with a higher selectivity may be subsequently used. Protruding remaining portions of the gate dielectric layer are minimized to reduce leakage current between adjacent transistors.

公开(公告)号：US12191305B2

公开(公告)日：2025-01-07

申请号：US18360889

申请日：2023-07-28

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Shi Ning Ju ,  Kuo-Cheng Chiang ,  Chih-Hao Wang ,  Kuan-Lun Cheng ,  Guan-Lin Chen

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/16 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78

Abstract: A first gate-all-around (GAA) transistor and a second GAA transistor may be formed on a substrate. The first GAA transistor includes at least one silicon plate, a first gate structure, a first source region, and a first drain region. The second GAA transistor includes at least one silicon-germanium plate, a second gate structure, a second source region, and a second drain region. The first GAA transistor may be an n-type field effect transistor, and the second GAA transistor may be a p-type field effect transistor. The gate electrodes of the first gate structure and the second gate structure may include a same conductive material. Each silicon plate and each silicon-germanium plate may be single crystalline and may have a same crystallographic orientation for each Miller index.

公开(公告)号：US11798944B2

公开(公告)日：2023-10-24

申请号：US17712255

申请日：2022-04-04

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Shi Ning Ju ,  Kuo-Cheng Chiang ,  Chih-Hao Wang ,  Kuan-Lun Cheng ,  Guan-Lin Chen

IPC: H01L27/088 ,  H01L29/417 ,  H01L29/78 ,  H01L29/16 ,  H01L29/06 ,  H01L29/66

CPC classification number: H01L27/0886 ,  H01L29/0653 ,  H01L29/0665 ,  H01L29/16 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785 ,  H01L2029/7858

Abstract: A first gate-all-around (GAA) transistor and a second GAA transistor may be formed on a substrate. The first GAA transistor includes at least one silicon plate, a first gate structure, a first source region, and a first drain region. The second GAA transistor includes at least one silicon-germanium plate, a second gate structure, a second source region, and a second drain region. The first GAA transistor may be an n-type field effect transistor, and the second GAA transistor may be a p-type field effect transistor. The gate electrodes of the first gate structure and the second gate structure may include a same conductive material. Each silicon plate and each silicon-germanium plate may be single crystalline and may have a same crystallographic orientation for each Miller index.

公开(公告)号：US11495677B2

公开(公告)日：2022-11-08

申请号：US16926258

申请日：2020-07-10

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Yi-Ruei Jhan ,  Kuan-Ting Pan ,  Kuo-Cheng Chiang ,  Kuan-Lun Cheng ,  Chih-Hao Wang

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/165

Abstract: A semiconductor device includes a first active fin structure and a second active fin structure extending along a first lateral direction. The semiconductor device includes a dummy fin structure, also extending along the first lateral direction, that is disposed between the first active fin structure and the second fin structure. The dummy fin structure includes a material that is configured to induce mechanical deformation of a first source/drain structure coupled to an end of the first active fin structure and a second source/drain structure coupled to an end of the second active fin structure.

公开(公告)号：US11296081B2

公开(公告)日：2022-04-05

申请号：US16910488

申请日：2020-06-24

Applicant: Taiwan Semiconductor Manufacturing Company Limited

Inventor： Shi Ning Ju ,  Kuo-Cheng Chiang ,  Chih-Hao Wang ,  Kuan-Lun Cheng ,  Guan-Lin Chen

IPC: H01L27/088 ,  H01L29/417 ,  H01L29/78 ,  H01L29/16 ,  H01L29/06 ,  H01L29/66

Abstract: A first gate-all-around (GAA) transistor and a second GAA transistor may be formed on a substrate. The first GAA transistor includes at least one silicon plate, a first gate structure, a first source region, and a first drain region. The second GAA transistor includes at least one silicon-germanium plate, a second gate structure, a second source region, and a second drain region. The first GAA transistor may be an n-type field effect transistor, and the second GAA transistor may be a p-type field effect transistor. The gate electrodes of the first gate structure and the second gate structure may include a same conductive material. Each silicon plate and each silicon-germanium plate may be single crystalline and may have a same crystallographic orientation for each Miller index.