公开(公告)号：US08907385B2

公开(公告)日：2014-12-09

申请号：US13728176

申请日：2012-12-27

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Shiu-Ko JangJian ,  Chin-Nan Wu ,  Chun-Che Lin

IPC: H01L31/062 ,  H01L27/146

CPC classification number: H01L27/14623 ,  H01L27/1462 ,  H01L27/14625 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14685 ,  H01L27/14689

Abstract: A backside illumination image sensor structure comprises an image sensor formed adjacent to a first side of a semiconductor substrate, wherein a first dielectric layer formed over the first side of the semiconductor substrate and an interconnect layer formed over the first dielectric layer. The image sensor structure further comprises a backside illumination film formed over a second side of the semiconductor substrate and a first silicon halogen compound layer formed between the second side of the semiconductor substrate and the backside illumination film.

Abstract translation: 背面照明图像传感器结构包括与半导体衬底的第一侧相邻形成的图像传感器，其中形成在半导体衬底的第一侧上的第一介电层和形成在第一介电层上的互连层。 图像传感器结构还包括形成在半导体衬底的第二侧上的背面照明膜和形成在半导体衬底的第二侧和背面照明膜之间的第一硅卤素化合物层。

公开(公告)号：US10658252B2

公开(公告)日：2020-05-19

申请号：US16390828

申请日：2019-04-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Jia-Ming Lin ,  Wei-Ken Lin ,  Shiu-Ko JangJian ,  Chun-Che Lin

IPC: H01L21/66 ,  H01L21/311 ,  H01L21/8234 ,  H01L21/84 ,  H01L21/3115 ,  H01L21/762 ,  H01L29/78

Abstract: A semiconductor structure with a stop layer for planarization process therein and a method for forming the same is disclosed. The method includes the steps of: forming a trench in a substrate and between active areas; filling the trench with isolation layer; doping the isolation layer with an element to form a doped isolation region; annealing the doped isolation region; and planarizing the annealed and doped isolation region and measuring a planarization depth thereof. The coefficients of thermal expansion (CTEs) of the stop layer, the dielectric layer, and the active area are different.

公开(公告)号：US20180053697A1

公开(公告)日：2018-02-22

申请号：US15782161

申请日：2017-10-12

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd

Inventor： Jia-Ming Lin ,  Wei-Ken Lin ,  Shiu-Ko JangJian ,  Chun-Che Lin

IPC: H01L21/66 ,  H01L29/78 ,  H01L21/3115 ,  H01L21/762 ,  H01L21/311

CPC classification number: H01L22/26 ,  H01L21/31105 ,  H01L21/31155 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823481 ,  H01L22/12 ,  H01L29/7846 ,  H01L29/785

Abstract: A semiconductor structure with a stop layer for planarization process therein and a method for forming the same is disclosed. The method includes the steps of: forming a trench in a substrate and between active areas; filling the trench with isolation layer; doping the isolation layer with an element to form a doped isolation region; annealing the doped isolation region; and planarizing the annealed and doped isolation region and measuring a planarization depth thereof. The coefficients of thermal expansion (CTEs) of the stop layer, the dielectric layer, and the active area are different.

公开(公告)号：US20140183681A1

公开(公告)日：2014-07-03

申请号：US13728176

申请日：2012-12-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Shiu-Ko JangJian ,  Chin-Nan Wu ,  Chun-Che Lin

IPC: H01L27/146

CPC classification number: H01L27/14623 ,  H01L27/1462 ,  H01L27/14625 ,  H01L27/1463 ,  H01L27/1464 ,  H01L27/14685 ,  H01L27/14689

Abstract: A backside illumination image sensor structure comprises an image sensor formed adjacent to a first side of a semiconductor substrate, wherein a first dielectric layer formed over the first side of the semiconductor substrate and an interconnect layer formed over the first dielectric layer. The image sensor structure further comprises a backside illumination film formed over a second side of the semiconductor substrate and a first silicon halogen compound layer formed between the second side of the semiconductor substrate and the backside illumination film.

Abstract translation: 背面照明图像传感器结构包括与半导体衬底的第一侧相邻形成的图像传感器，其中形成在半导体衬底的第一侧上的第一介电层和形成在第一介电层上的互连层。 图像传感器结构还包括形成在半导体衬底的第二侧上的背面照明膜和形成在半导体衬底的第二侧和背面照明膜之间的第一硅卤素化合物层。

公开(公告)号：US20190335571A1

公开(公告)日：2019-10-31

申请号：US15967153

申请日：2018-04-30

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Ming-Fa Wu ,  Tzung-Chi Fu ,  Chun-Che Lin ,  Po-Chung Cheng ,  Huai-Tei Yang

IPC: H05G2/00

Abstract: An extreme ultra-violet (EUV) lithography system includes an EUV source and EUV scanner. A droplet generator provides a droplet stream in the EUV source. A gas shield is configured to surround the droplet stream. When a laser reacts a droplet in the stream, EUV radiation and ionized particles are produced. The gas shield can reduce contamination resulting from the ionized particles by conveying the ionized particles to a droplet catcher. Components of the EUV source may be biased with a voltage to repel or attract ionized particles to reduce contamination from the ionized particles.

公开(公告)号：US20190252273A1

公开(公告)日：2019-08-15

申请号：US16390828

申请日：2019-04-22

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Jia-Ming Lin ,  Wei-Ken Lin ,  Shiu-Ko JangJian ,  Chun-Che Lin

IPC: H01L21/66 ,  H01L21/311 ,  H01L29/78 ,  H01L21/3115 ,  H01L21/762

CPC classification number: H01L22/26 ,  H01L21/31105 ,  H01L21/31155 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823481 ,  H01L21/845 ,  H01L22/12 ,  H01L29/7846 ,  H01L29/785

Abstract: A semiconductor structure with a stop layer for planarization process therein and a method for forming the same is disclosed. The method includes the steps of: forming a trench in a substrate and between active areas; filling the trench with isolation layer; doping the isolation layer with an element to form a doped isolation region; annealing the doped isolation region; and planarizing the annealed and doped isolation region and measuring a planarization depth thereof. The coefficients of thermal expansion (CTEs) of the stop layer, the dielectric layer, and the active area are different.

公开(公告)号：US10269664B2

公开(公告)日：2019-04-23

申请号：US15782161

申请日：2017-10-12

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Jia-Ming Lin ,  Wei-Ken Lin ,  Shiu-Ko JangJian ,  Chun-Che Lin

IPC: H01L21/66 ,  H01L21/3115 ,  H01L21/762 ,  H01L29/78 ,  H01L21/311 ,  H01L21/8234

Abstract: A semiconductor structure with a stop layer for planarization process therein and a method for forming the same is disclosed. The method includes the steps of: forming a trench in a substrate and between active areas; filling the trench with isolation layer; doping the isolation layer with an element to form a doped isolation region; annealing the doped isolation region; and planarizing the annealed and doped isolation region and measuring a planarization depth thereof. The coefficients of thermal expansion (CTEs) of the stop layer, the dielectric layer, and the active area are different.