公开(公告)号：US20210359111A1

公开(公告)日：2021-11-18

申请号：US17109895

申请日：2020-12-02

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Ya-Wen CHIU ,  Yi Che CHAN ,  Lun-Kuang TAN ,  Zheng-Yang PAN ,  Cheng-Po CHAU ,  Pin-Ju LIANG ,  Hung-Yao CHEN ,  De-Wei YU ,  Yi-Cheng LI

IPC: H01L29/66 ,  H01L27/092 ,  H01L29/78 ,  H01L29/161 ,  H01L29/10 ,  H01L21/02 ,  H01L21/8238

Abstract: In a method of manufacturing a semiconductor device, a fin structure having a channel region protruding from an isolation insulating layer disposed over a semiconductor substrate is formed, a cleaning operation is performed, and an epitaxial semiconductor layer is formed over the channel region. The cleaning operation and the forming the epitaxial semiconductor layer are performed in a same chamber without breaking vacuum.

公开(公告)号：US20190043763A1

公开(公告)日：2019-02-07

申请号：US15670401

申请日：2017-08-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Cheng LI ,  Chien-Hao CHEN ,  Yung-Cheng LU ,  Jr-Jung LIN ,  Chun-Hung LEE ,  Chao-Cheng CHEN

IPC: H01L21/8238 ,  H01L21/28 ,  H01L27/108 ,  H01L29/66 ,  H01L27/092

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a first amorphous layer over a substrate. The substrate has a base portion and a first fin portion over the base portion, and the first amorphous layer covers the first fin portion. The method includes annealing the first amorphous layer to crystallize the first amorphous layer into a first polycrystalline layer. The method includes forming a second amorphous layer over the first polycrystalline layer. The method includes removing a first portion of the second amorphous layer and a second portion of the first polycrystalline layer under the first portion. The remaining second amorphous layer and the remaining first polycrystalline layer together form a first gate structure over and across the first fin portion.

公开(公告)号：US20250022956A1

公开(公告)日：2025-01-16

申请号：US18513116

申请日：2023-11-17

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Cheng LI ,  Jheng-Wei LIN ,  Ta-Chun MA

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device and a method of fabricating the semiconductor device are disclosed. The semiconductor device includes a substrate, a nanostructured channel region disposed on the substrate, a gate structure surrounding the nanostructured channel region, a source/drain (S/D) region disposed adjacent to the nanostructured channel region, an etch stop layer (ESL) disposed on the S/D region, a stress liner disposed on the etch stop layer and configured to provide compressive stress in the nanostructured channel region, an inter-layer dielectric (ILD) layer disposed on the stress liner, and a contact structure disposed in the S/D region, ESL, stress liner, and ILD layer.