公开(公告)号：US11704472B2

公开(公告)日：2023-07-18

申请号：US17523600

申请日：2021-11-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sheng-Hsiung Chen ,  Jerry Chang-Jui Kao ,  Fong-Yuan Chang ,  Po-Hsiang Huang ,  Shao-Huan Wang ,  XinYong Wang ,  Yi-Kan Cheng ,  Chun-Chen Chen

IPC: G06F30/00 ,  G06F30/398 ,  G06F30/394 ,  H01L27/02 ,  G06F111/04 ,  G06F30/18 ,  G06F119/18 ,  G06F111/20

CPC classification number: G06F30/398 ,  G06F30/394 ,  H01L27/0207 ,  G06F30/18 ,  G06F2111/04 ,  G06F2111/20 ,  G06F2119/18

Abstract: Standard cell libraries include one or more standard cells and one or more corresponding standard cell variations. The one or more standard cell variations are different from their one or more standard cells in terms of geometric shapes, locations of the geometric shapes, and/or interconnections between the geometric shapes. The exemplary systems and methods described herein selectively choose from among the one or more standard cells and/or the one or more standard cell variations to form an electronic architectural design for an electronic device. In some situations, some of the one or more standard cells are unable to satisfy one or more electronic design constraints imposed by a semiconductor foundry and/or semiconductor technology node when placed onto the electronic device design real estate. In these situations, the one or more standard cell variations corresponding to these standard cells are placed onto the electronic device design real estate.

公开(公告)号：US10741539B2

公开(公告)日：2020-08-11

申请号：US15800693

申请日：2017-11-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sheng-Hsiung Chen ,  Jerry Chang-Jui Kao ,  Fong-Yuan Chang ,  Po-Hsiang Huang ,  Shao-Huan Wang ,  XinYong Wang ,  Yi-Kan Cheng ,  Chun-Chen Chen

IPC: H01L27/02 ,  G06F30/394 ,  G06F30/398 ,  G06F111/04 ,  G06F111/20 ,  G06F119/18 ,  G06F30/18

Abstract: Standard cell libraries include one or more standard cells and one or more corresponding standard cell variations. The one or more standard cell variations are different from their one or more standard cells in terms of geometric shapes, locations of the geometric shapes, and/or interconnections between the geometric shapes. The exemplary systems and methods described herein selectively choose from among the one or more standard cells and/or the one or more standard cell variations to form an electronic architectural design for an electronic device. In some situations, some of the one or more standard cells are unable to satisfy one or more electronic design constraints imposed by a semiconductor foundry and/or semiconductor technology node when placed onto the electronic device design real estate. In these situations, the one or more standard cell variations corresponding to these standard cells are placed onto the electronic device design real estate.

公开(公告)号：US11182533B2

公开(公告)日：2021-11-23

申请号：US16912061

申请日：2020-06-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sheng-Hsiung Chen ,  Jerry Chang-Jui Kao ,  Fong-Yuan Chang ,  Po-Hsiang Huang ,  Shao-Huan Wang ,  XinYong Wang ,  Yi-Kan Cheng ,  Chun-Chen Chen

IPC: G06F30/00 ,  G06F30/398 ,  H01L27/02 ,  G06F30/394 ,  G06F111/04 ,  G06F111/20 ,  G06F119/18 ,  G06F30/18

Abstract: Standard cell libraries include one or more standard cells and one or more corresponding standard cell variations. The one or more standard cell variations are different from their one or more standard cells in terms of geometric shapes, locations of the geometric shapes, and/or interconnections between the geometric shapes. The exemplary systems and methods described herein selectively choose from among the one or more standard cells and/or the one or more standard cell variations to form an electronic architectural design for an electronic device. In some situations, some of the one or more standard cells are unable to satisfy one or more electronic design constraints imposed by a semiconductor foundry and/or semiconductor technology node when placed onto the electronic device design real estate. In these situations, the one or more standard cell variations corresponding to these standard cells are placed onto the electronic device design real estate.

公开(公告)号：US20190064770A1

公开(公告)日：2019-02-28

申请号：US15800693

申请日：2017-11-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Sheng-Hsiung CHEN ,  Jerry Chang-Jui Kao ,  Fong-Yuan Chang ,  Po-Hsiang Huang ,  Shao-Huan Wang ,  XinYong Wang ,  Yi-Kan Cheng ,  Chun-Chen Chen

IPC: G05B19/4097 ,  G06F17/50 ,  H01L27/02

Abstract: Exemplary embodiments for multiple standard cell libraries are disclosed that include one or more standard cells and one or more corresponding standard cell variations. The one or more standard cell variations have similar functionality as their one or more standard cells but are different from their one or more standard cells in terms of geometric shapes, locations of the geometric shapes, and/or interconnections between the geometric shapes. The exemplary systems and methods described herein selectively choose from among the one or more standard cells and/or the one or more standard cell variations to form an electronic architectural design for analog circuitry and/or digital circuitry of an electronic device. In an exemplary embodiment, a semiconductor foundry and/or semiconductor technology node can impose one or more electronic design constraints on the placement of the one or more standard cells onto an electronic device design real estate. In some situations, some of the one or more standard cells are unable to satisfy the one or more electronic design constraints when placed onto the electronic device design real estate. In these situations, the one or more standard cell variations corresponding to these standard cells are placed onto the electronic device design real estate.