公开(公告)号：US20210343533A1

公开(公告)日：2021-11-04

申请号：US17377839

申请日：2021-07-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shu-Han Chen ,  Tsung-Ju Chen ,  Ta-Hsiang Kung ,  Xiong-Fei Yu ,  Chi On Chui

IPC: H01L21/28 ,  H01L29/08 ,  H01L29/45 ,  H01L29/49 ,  H01L29/78 ,  H01L21/285 ,  H01L29/66 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3105 ,  H01L21/8234 ,  H01L29/423

Abstract: A method may include forming a dummy dielectric layer over a substrate, and forming a dummy gate over the dummy dielectric layer. The method may also include forming a first spacer adjacent the dummy gate, and removing the dummy gate to form a cavity, where the cavity is defined at least in part by the first spacer. The method may also include performing a plasma treatment on portions of the first spacer, where the plasma treatment causes a material composition of the portions of the first spacer to change from a first material composition to a second material composition. The method may also include etching the portions of the first spacer having the second material composition to remove the portions of the first spacer having the second material composition, and filling the cavity with conductive materials to form a gate structure.

公开(公告)号：US20240145250A1

公开(公告)日：2024-05-02

申请号：US18411197

申请日：2024-01-12

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shu-Han Chen ,  Tsung-Ju Chen ,  Ta-Hsiang Kung ,  Xiong-Fei Yu ,  Chi On Chui

IPC: H01L21/28 ,  H01L21/02 ,  H01L21/285 ,  H01L21/3105 ,  H01L21/311 ,  H01L21/8234 ,  H01L29/08 ,  H01L29/423 ,  H01L29/45 ,  H01L29/49 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/28141 ,  H01L21/0234 ,  H01L21/28518 ,  H01L21/31055 ,  H01L21/31116 ,  H01L21/823456 ,  H01L21/823468 ,  H01L29/0847 ,  H01L29/4236 ,  H01L29/42372 ,  H01L29/45 ,  H01L29/4983 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/7856

Abstract: A method may include forming a dummy dielectric layer over a substrate, and forming a dummy gate over the dummy dielectric layer. The method may also include forming a first spacer adjacent the dummy gate, and removing the dummy gate to form a cavity, where the cavity is defined at least in part by the first spacer. The method may also include performing a plasma treatment on portions of the first spacer, where the plasma treatment causes a material composition of the portions of the first spacer to change from a first material composition to a second material composition. The method may also include etching the portions of the first spacer having the second material composition to remove the portions of the first spacer having the second material composition, and filling the cavity with conductive materials to form a gate structure.

公开(公告)号：US20230126442A1

公开(公告)日：2023-04-27

申请号：US17662532

申请日：2022-05-09

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tsung-Ju Chen ,  Shu-Han Chen ,  Chun-Heng Chen ,  Chi On Chui

IPC: H01L29/66

Abstract: A method includes forming a dummy gate oxide on a wafer, and the dummy gate oxide is formed on a sidewall and a top surface of a protruding semiconductor fin in the wafer. The formation of the dummy gate oxide may include a Plasma Enhanced Chemical Vapor Deposition (PECVD) process in a deposition chamber, and the PECVD process includes applying a Radio Frequency (RF) power to a conductive plate below the wafer. The method further includes forming a dummy gate electrode over the dummy gate oxide, removing the dummy gate electrode and the dummy gate oxide to form a trench between opposing gate spacers, and forming a replacement gate in the trench.

公开(公告)号：US11908695B2

公开(公告)日：2024-02-20

申请号：US17377839

申请日：2021-07-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shu-Han Chen ,  Tsung-Ju Chen ,  Ta-Hsiang Kung ,  Xiong-Fei Yu ,  Chi On Chui

IPC: H01L29/78 ,  H01L21/28 ,  H01L29/08 ,  H01L29/45 ,  H01L29/49 ,  H01L21/285 ,  H01L29/66 ,  H01L21/02 ,  H01L21/311 ,  H01L21/3105 ,  H01L21/8234 ,  H01L29/423

CPC classification number: H01L21/28141 ,  H01L21/0234 ,  H01L21/28518 ,  H01L21/31055 ,  H01L21/31116 ,  H01L21/823456 ,  H01L21/823468 ,  H01L29/0847 ,  H01L29/4236 ,  H01L29/42372 ,  H01L29/45 ,  H01L29/4983 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/7856

Abstract: A method may include forming a dummy dielectric layer over a substrate, and forming a dummy gate over the dummy dielectric layer. The method may also include forming a first spacer adjacent the dummy gate, and removing the dummy gate to form a cavity, where the cavity is defined at least in part by the first spacer. The method may also include performing a plasma treatment on portions of the first spacer, where the plasma treatment causes a material composition of the portions of the first spacer to change from a first material composition to a second material composition. The method may also include etching the portions of the first spacer having the second material composition to remove the portions of the first spacer having the second material composition, and filling the cavity with conductive materials to form a gate structure.