公开(公告)号：US10700177B2

公开(公告)日：2020-06-30

申请号：US15964352

申请日：2018-04-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Hsiu Hung ,  Yi-Hsiang Chao ,  Kuan-Yu Yeh ,  Kan-Ju Lin ,  Chun-Wen Nieh ,  Huang-Yi Huang ,  Chih-Wei Chang ,  Ching-Hwanq Su

IPC: H01L29/45 ,  H01L21/768 ,  H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L21/3213 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/306 ,  H01L29/08

Abstract: A method for forming a semiconductor device structure is provided. The method includes providing a semiconductor substrate including a conductive region made of silicon, germanium or a combination thereof. The method also includes forming an insulating layer over the semiconductor substrate and forming an opening in the insulating layer to expose the conductive region. The method also includes performing a deposition process to form a metal layer over a sidewall and a bottom of the opening, so that a metal silicide or germanide layer is formed on the exposed conductive region by the deposition process. The method also includes performing a first in-situ etching process to etch at least a portion of the metal layer and forming a fill metal material layer in the opening.

公开(公告)号：US20220376111A1

公开(公告)日：2022-11-24

申请号：US17484039

申请日：2021-09-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kan-Ju Lin ,  Chien Chang ,  Chih-Shiun Chou ,  TaiMin Chang ,  Hung-Yi Huang ,  Chih-Wei Chang ,  Ming-Hsing Tsai ,  Lin-Yu Huang

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/66 ,  H01L21/768

Abstract: A semiconductor device includes a gate structure on a semiconductor fin, a dielectric layer on the gate structure, and a gate contact extending through the dielectric layer to the gate structure. The gate contact includes a first conductive material on the gate structure, a top surface of the first conductive material extending between sidewalls of the dielectric layer, and a second conductive material on the top surface of the first conductive material.

公开(公告)号：US11011611B2

公开(公告)日：2021-05-18

申请号：US16914638

申请日：2020-06-29

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Min-Hsiu Hung ,  Yi-Hsiang Chao ,  Kuan-Yu Yeh ,  Kan-Ju Lin ,  Chun-Wen Nieh ,  Huang-Yi Huang ,  Chih-Wei Chang ,  Ching-Hwanq Su

IPC: H01L29/45 ,  H01L21/768 ,  H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L21/3213 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/306 ,  H01L29/08

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate having a conductive region made of silicon, germanium or a combination thereof. The semiconductor device structure also includes an insulating layer over the semiconductor substrate and a fill metal material layer in the insulating layer. In addition, the semiconductor device structure includes a nitrogen-containing metal silicide or germanide layer between the conductive region and the fill metal material layers.

公开(公告)号：US12002867B2

公开(公告)日：2024-06-04

申请号：US17459494

申请日：2021-08-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Chia-Hung Chu ,  Shuen-Shin Liang ,  Hsu-Kai Chang ,  Tzu Pei Chen ,  Kan-Ju Lin ,  Chien Chang ,  Hung-Yi Huang ,  Sung-Li Wang

IPC: H01L29/45 ,  H01L21/311 ,  H01L21/8234 ,  H01L23/532 ,  H01L23/535 ,  H01L29/40 ,  H01L29/417

CPC classification number: H01L29/45 ,  H01L21/31116 ,  H01L21/823475 ,  H01L23/53242 ,  H01L23/535 ,  H01L29/401 ,  H01L29/41791

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a gate structure over the substrate, a layer of dielectric material over the gate structure, a source/drain (S/D) contact layer formed through and adjacent to the gate structure, and a trench conductor layer over and in contact with the S/D contact layer. The S/D contact layer can include a layer of platinum-group metallic material and a silicide layer formed between the substrate and the layer of platinum-group metallic material. A top width of a top portion of the layer of platinum-group metallic material can be greater than or substantially equal to a bottom width of a bottom portion of the layer of platinum-group metallic material.

公开(公告)号：US20240404876A1

公开(公告)日：2024-12-05

申请号：US18788772

申请日：2024-07-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kan-Ju Lin ,  Chien Chang ,  Chih-Shiun Chou ,  Tai Min Chang ,  Yi-Ning Tai ,  Hung-Yi Huang ,  Chih-Wei Chang ,  Ming-Hsing Tsai ,  Lin-Yu Huang

IPC: H01L21/768 ,  H01L21/311 ,  H01L23/535 ,  H01L29/66 ,  H01L29/78

Abstract: Semiconductor devices and methods of manufacturing are provided. In some embodiments the method includes depositing an etch stop layer over a first hard mask material, the first hard mask material over a gate stack, depositing an interlayer dielectric over the etch stop layer, forming a first opening through the interlayer dielectric, the etch stop layer, and the first hard mask material, the first opening exposing a conductive portion of the gate stack, and treating sidewalls of the first opening with a first dopant to form a first treated region within the interlayer dielectric, a second treated region within the etch stop layer, a third treated region within the first hard mask material, and a fourth treated region within the conductive portion, wherein after the treating the fourth treated region has a higher concentration of the first dopant than the first treated region.

公开(公告)号：US11222818B2

公开(公告)日：2022-01-11

申请号：US16034843

申请日：2018-07-13

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Yi-Hsiang Chao ,  Min-Hsiu Hung ,  Chun-Wen Nieh ,  Ya-Huei Li ,  Yu-Hsiang Liao ,  Li-Wei Chu ,  Kan-Ju Lin ,  Kuan-Yu Yeh ,  Chi-Hung Chuang ,  Chih-Wei Chang ,  Ching-Hwanq Su ,  Hung-Yi Huang ,  Ming-Hsing Tsai

IPC: H01L23/00 ,  H01L21/768 ,  H01L29/78 ,  H01L29/08 ,  H01L29/06 ,  H01L29/45 ,  H01L21/324 ,  H01L29/66 ,  H01L21/285 ,  H01L21/265 ,  H01L23/535

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a fin structure over a semiconductor substrate and forming a gate stack over the fin structure. The method also includes forming an epitaxial structure over the fin structure, and the epitaxial structure is adjacent to the gate stack. The method further includes forming a dielectric layer over the epitaxial structure and forming an opening in the dielectric layer to expose the epitaxial structure. In addition, the method includes applying a metal-containing material on the epitaxial structure while the epitaxial structure is heated so that a portion of the epitaxial structure is transformed to form a metal-semiconductor compound region.

公开(公告)号：US20230036693A1

公开(公告)日：2023-02-02

申请号：US17675558

申请日：2022-02-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Kan-Ju Lin ,  Chien Chang ,  Chih-Shiun Chou ,  Tai Min Chang ,  Yi-Ning Tai ,  Hung-Yi Huang ,  Chih-Wei Chang ,  Ming-Hsing Tsai ,  Lin-Yu Huang

IPC: H01L21/768 ,  H01L29/78 ,  H01L23/535 ,  H01L21/311 ,  H01L29/66

Abstract: Semiconductor devices and methods of manufacturing are provided. In some embodiments the method includes depositing an etch stop layer over a first hard mask material, the first hard mask material over a gate stack, depositing an interlayer dielectric over the etch stop layer, forming a first opening through the interlayer dielectric, the etch stop layer, and the first hard mask material, the first opening exposing a conductive portion of the gate stack, and treating sidewalls of the first opening with a first dopant to form a first treated region within the interlayer dielectric, a second treated region within the etch stop layer, a third treated region within the first hard mask material, and a fourth treated region within the conductive portion, wherein after the treating the fourth treated region has a higher concentration of the first dopant than the first treated region.