公开(公告)号：US11754923B2

公开(公告)日：2023-09-12

申请号：US17214660

申请日：2021-03-26

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Ya-Ching Chang ,  Chen-Yu Liu ,  Ching-Yu Chang ,  Chin-Hsiang Lin

IPC: B05D1/00 ,  G03F7/16 ,  H01L21/67 ,  H01L21/02

CPC classification number: G03F7/16 ,  H01L21/6715 ,  H01L21/67017 ,  B05D1/005 ,  G03F7/162 ,  H01L21/02282

Abstract: In a method, a resist material is dispensed through a tube of a nozzle of a resist pump system on a wafer. The tube extends from a top to a bottom of the nozzle and has upper, lower, and middle segments. When not dispensing, the resist material is retracted from the lower and the middle segments, and maintained in the upper segment of the tube. When retracting, a first solvent is flown through a tip of the nozzle at the bottom of the nozzle to fill the lower segment of the tube with the first solvent and to produce a gap in the middle segment of the tube between the resist material and the first solvent. The middle segment includes resist material residues on an inner surface wall of the tube and vapor of the first solvent. The vapor of the first solvent prevents the resist material residues from drying.

公开(公告)号：US20220359756A1

公开(公告)日：2022-11-10

申请号：US17814681

申请日：2022-07-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Hsiang Lin ,  Tai-Chun Huang ,  Tien-I Bao

IPC: H01L29/78 ,  H01L29/417 ,  H01L21/768 ,  H01L21/02 ,  H01L21/033 ,  H01L21/8234 ,  H01L23/528 ,  H01L29/66

Abstract: An embodiment is a method including recessing a gate electrode over a semiconductor fin on a substrate to form a first recess from a top surface of a dielectric layer, forming a first mask in the first recess over the recessed gate electrode, recessing a first conductive contact over a source/drain region of the semiconductor fin to form a second recess from the top surface of the dielectric layer, and forming a second mask in the second recess over the recessed first conductive contact.

公开(公告)号：US11300878B2

公开(公告)日：2022-04-12

申请号：US15938599

申请日：2018-03-28

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： An-Ren Zi ,  Chin-Hsiang Lin ,  Ching-Yu Chang ,  Joy Cheng

IPC: G03F7/32 ,  G03F7/004 ,  H01L21/47 ,  H01L21/027 ,  G03F7/038

Abstract: A photoresist developer includes a solvent having Hansen solubility parameters of 15 pKa>9.5; and a chelate.

公开(公告)号：US11295961B2

公开(公告)日：2022-04-05

申请号：US16697988

申请日：2019-11-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Yen-Hao Chen ,  Wei-Han Lai ,  Ching-Yu Chang ,  Chin-Hsiang Lin

IPC: H01L21/00 ,  H01L21/321 ,  H01L21/02 ,  H01L21/027 ,  H01L21/3105

Abstract: A method of manufacturing a semiconductor device is disclosed herein. The method includes forming a first layer of a first planarizing material over a patterned surface of a substrate, forming a second layer of a second planarizing material over the first planarizing layer, crosslinking a portion of the first planarizing material and a portion of the second planarizing material, and removing a portion of the second planarizing material that is not crosslinked. In an embodiment, the method further includes forming a third layer of a third planarizing material over the second planarizing material after removing the portion of the second planarizing material that is not crosslinked. The third planarizing material can include a bottom anti-reflective coating or a spin-on carbon, and an acid or an acid generator. The first planarizing material can include a spin-on carbon, and an acid, a thermal acid generator or a photoacid generator.

公开(公告)号：US11287740B2

公开(公告)日：2022-03-29

申请号：US16197349

申请日：2018-11-20

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： An-Ren Zi ,  Chin-Hsiang Lin ,  Ching-Yu Chang

IPC: G03F7/004 ,  G03F7/16 ,  G03F7/20 ,  G03F7/32 ,  H01L21/027 ,  G03F7/40 ,  G03F7/038 ,  G03F7/039

Abstract: A photoresist composition includes a photoresist material including metal oxide nanoparticles and a ligand, and an acid having an acid dissociation constant, pKa, of −15 pKa>9.

公开(公告)号：US11239078B2

公开(公告)日：2022-02-01

申请号：US16921032

申请日：2020-07-06

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Shih-Chun Huang ,  Chiu-Hsiang Chen ,  Ya-Wen Yeh ,  Yu-Tien Shen ,  Po-Chin Chang ,  Chien Wen Lai ,  Wei-Liang Lin ,  Ya Hui Chang ,  Yung-Sung Yen ,  Li-Te Lin ,  Pinyen Lin ,  Ru-Gun Liu ,  Chin-Hsiang Lin

IPC: H01L21/302 ,  H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/027 ,  H01L21/02 ,  H01L21/265 ,  H01L21/3115

Abstract: A method of manufacturing a semiconductor device including operations of forming a first hard mask over an underlying layer on a substrate by a photolithographic and etching method, forming a sidewall spacer pattern having a first sidewall portion and a second sidewall portion on opposing sides of the first hard mask, etching the first sidewall portion, etching the first hard mask and leaving the second sidewall portion bridging a gap of the etched first hard mask, and processing the underlying layer using the second hard mask.

公开(公告)号：US11079681B2

公开(公告)日：2021-08-03

申请号：US16248601

申请日：2019-01-15

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

Inventor： Ming-Hui Weng ,  Chen-Yu Liu ,  Cheng-Han Wu ,  Ching-Yu Chang ,  Chin-Hsiang Lin

IPC: G03F7/40 ,  G03F7/30 ,  G03F7/32 ,  G03F7/20 ,  G03F1/82

Abstract: A lithography method includes forming a resist layer over a substrate. The resist layer is exposed to radiation. The exposed resist layer is developed using a developer that removes an exposed portion of the exposed resist layer, thereby forming a patterned resist layer. The patterned resist layer is rinsed using a basic aqueous rinse solution.

公开(公告)号：US11009796B2

公开(公告)日：2021-05-18

申请号：US16572286

申请日：2019-09-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ming-Hui Weng ,  An-Ren Zi ,  Ching-Yu Chang ,  Chin-Hsiang Lin ,  Chen-Yu Liu

IPC: G03F7/30 ,  G03F7/32 ,  H01L21/033 ,  H01L21/311 ,  H01L21/02 ,  H01L21/3115 ,  G03F7/40

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a material layer over a substrate and forming a resist layer over the material layer. The resist layer includes an inorganic material and an auxiliary. The inorganic material includes a plurality of metallic cores and a plurality of first linkers bonded to the metallic cores. The method includes exposing a portion of the resist layer. The resist layer includes an exposed region and an unexposed region. In the exposed region, the auxiliary reacts with the first linkers. The method also includes removing the unexposed region of the resist layer by using a developer to form a patterned resist layer. The developer includes a ketone-based solvent having a formula (a) or the ester-based solvent having a formula (b).

公开(公告)号：US10990013B2

公开(公告)日：2021-04-27

申请号：US16053463

申请日：2018-08-02

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： An-Ren Zi ,  Ching-Yu Chang ,  Chin-Hsiang Lin

IPC: G03F7/32 ,  H01L21/266 ,  H01L21/027 ,  H01L21/033 ,  H01L21/311 ,  G03F7/025 ,  H01L21/308 ,  G03F7/004 ,  G03F7/027 ,  G03F7/09 ,  G03F7/038

Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a material layer over a substrate and forming a resist layer over the material layer. The resist layer includes an inorganic material and an auxiliary. The inorganic material includes a plurality of metallic cores and a plurality of first linkers bonded to the metallic cores. The method includes exposing a portion of the resist layer. The resist layer includes an exposed region and an unexposed region. In the exposed region, the auxiliary reacts with the first linkers. The method also includes removing the unexposed region of the resist layer by using a developer to form a patterned resist layer. The developer includes a ketone-based solvent having a formula (a), wherein R1 is linear or branched C1-C5 alkyl, and R2 is linear or branched C3-C9 alkyl.

公开(公告)号：US10802402B2

公开(公告)日：2020-10-13

申请号：US16228259

申请日：2018-12-20

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Wei-Han Lai ,  Chien-Wei Wang ,  Ching-Yu Chang ,  Chin-Hsiang Lin

IPC: G03F7/16 ,  H01L21/033 ,  H01L21/02 ,  G03F7/20 ,  G03F7/09 ,  G03F7/11

Abstract: Provided is a material composition and method for substrate modification. A substrate is patterned to include a plurality of features. The plurality of features includes a first subset of features having one or more substantially inert surfaces. In various embodiments, a priming material is deposited over the substrate, over the plurality of features, and over the one or more substantially inert surfaces. By way of example, the deposited priming material bonds at least to the one or more substantially inert surfaces. Additionally, the deposited priming material provides a modified substrate surface. After depositing the priming material, a layer is spin-coated over the modified substrate surface, where the spin-coated layer is substantially planar.