公开(公告)号：US11688766B2

公开(公告)日：2023-06-27

申请号：US17712234

申请日：2022-04-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shuen-Shin Liang ,  Chen-Han Wang ,  Keng-Chu Lin ,  Tetsuji Ueno ,  Ting-Ting Chen

IPC: H01L29/06 ,  H01L21/02 ,  H01L29/78 ,  H01L29/417 ,  H01L29/66 ,  H01L27/088

CPC classification number: H01L29/0653 ,  H01L21/02447 ,  H01L21/02529 ,  H01L27/0886 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/7851

Abstract: The present disclosure relates to a semiconductor device including first and second terminals formed on a fin region and a seal layer formed between the first and second terminals. The seal layer includes a silicon carbide material doped with oxygen. The semiconductor device also includes an air gap surrounded by the seal layer, the fin region, and the first and second terminals.

公开(公告)号：US11626482B2

公开(公告)日：2023-04-11

申请号：US17192134

申请日：2021-03-04

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ting-Ting Chen ,  Chen-Han Wang ,  Keng-Chu Lin ,  Shuen-Shin Liang ,  Tsu-Hsiu Perng ,  Tsai-Jung Ho ,  Tsung-Han Ko ,  Tetsuji Ueno ,  Yahru Cheng

IPC: H01L29/06 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/768 ,  H01L29/49

Abstract: The present disclosure describes a method of forming an intermediate spacer structure between a gate structure and a source/drain (S/D) contact structure and removing a top portion of the intermediate spacer structure to form a recess. The intermediate spacer structure includes a first spacer layer, a second spacer layer, and a sacrificial spacer layer between the first spacer layer and the second spacer layer. The method further includes removing the sacrificial spacer layer to form an air gap between the first spacer layer and the second spacer layer and spinning a dielectric layer on the air gap, the first spacer layer, and the second spacer layer to fill in the recess and seal the air gap. The dielectric layer includes raw materials for a spin-on dielectric material.

公开(公告)号：US20220190137A1

公开(公告)日：2022-06-16

申请号：US17683251

申请日：2022-02-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Han Wang ,  Ding-Kang Shih ,  Chun-Hsiung Lin ,  Teng-Chun Tsai ,  Zhi-Chang Lin ,  Akira Mineji ,  Yao-Sheng Huang

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/78

Abstract: The present disclosure describes an inner spacer structure for a semiconductor device and a method for forming the same. The method for forming the inner spacer structure in the semiconductor device can include forming a vertical structure over a substrate, forming a gate structure over a portion of the vertical structure, exposing sidewalls of the portion of the vertical structure, forming multiple spacers over the sidewalls of the portion of the vertical structure, and forming a void in each of the multiple spacers.

公开(公告)号：US20210193798A1

公开(公告)日：2021-06-24

申请号：US16937344

申请日：2020-07-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shuen-Shin Liang ,  Chen-Han Wang ,  Keng-Chu Lin ,  Tstsuji Ueno ,  Ting-Ting Chen

IPC: H01L29/06 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L27/088 ,  H01L21/02

Abstract: The present disclosure relates to a semiconductor device including first and second terminals formed on a fin region and a seal layer formed between the first and second terminals. The seal layer includes a silicon carbide material doped with oxygen. The semiconductor device also includes an air gap surrounded by the seal layer, the fin region, and the first and second terminals.

公开(公告)号：US20200043923A1

公开(公告)日：2020-02-06

申请号：US16595373

申请日：2019-10-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Han Wang ,  Chun-Hsiung Lin

IPC: H01L27/088 ,  H01L21/32 ,  H01L21/8234 ,  H01L29/417

Abstract: A semiconductor device having a first region and a second region is provided. The first region has a first protruding structure and a second protruding structure. The second region has a third protruding structure and a fourth protruding structure. First, second, third, and fourth epi-layers are formed on the first, second, third, and fourth protruding structures, respectively. The first and second epi-layers are covered with a first photoresist layer while leaving the third and fourth epi-layers exposed. A dielectric layer is formed over the first photoresist layer and over the third and fourth epi-layers. A portion of the dielectric layer is covered with a second photoresist layer. The portion of the dielectric layer is formed over the third and fourth epi-layers. Portions of the dielectric layer not protected by the first and second photoresist layers are etched. The first and second photoresist layers are removed.

公开(公告)号：US11901220B2

公开(公告)日：2024-02-13

申请号：US16937237

申请日：2020-07-23

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shuen-Shin Liang ,  Chen-Han Wang ,  Keng-Chu Lin ,  Tetsuji Ueno ,  Ting-Ting Chen

IPC: H01L21/768 ,  H01L29/66

CPC classification number: H01L21/7682 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76831 ,  H01L21/76832 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/6653

Abstract: The present disclosure relates to a method for forming a semiconductor device includes forming an opening between first and second sidewalls of respective first and second terminals. The first and second sidewalls oppose each other. The method further includes depositing a first dielectric material at a first deposition rate on top portions of the opening and depositing a second dielectric material at a second deposition rate on the first dielectric material and on the first and second sidewalls. The second dielectric material and the first and second sidewalls entrap a pocket of air. The method also includes performing a treatment process on the second dielectric material.

公开(公告)号：US11848238B2

公开(公告)日：2023-12-19

申请号：US16916397

申请日：2020-06-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Han Wang ,  Keng-Chu Lin ,  Shuen-Shin Liang ,  Tetsuji Ueno ,  Ting-Ting Chen

IPC: H01L21/8234 ,  H01L29/66 ,  H01L29/49 ,  H01L29/423 ,  H01L29/78 ,  H01L29/06 ,  H01L29/786

CPC classification number: H01L21/823431 ,  H01L21/823418 ,  H01L21/823425 ,  H01L21/823468 ,  H01L29/0653 ,  H01L29/42392 ,  H01L29/4991 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78696

Abstract: The present disclosure describes a method of fabricating a semiconductor structure that includes forming a fin structure on a substrate, forming a polysilicon gate structure on a first portion of the fin structure, forming an opening in a second portion of the fin structure, wherein the first and second portions of the fin structure is adjacent to each other, forming a recess laterally on a sidewall of the first portion of the fin structure underlying the polysilicon gate structure, and forming an inner spacer structure within the recess. The inner spacer structure comprises an inner air spacer enclosed by a first dielectric spacer layer and a second dielectric spacer layer.

公开(公告)号：US11430891B2

公开(公告)日：2022-08-30

申请号：US16571817

申请日：2019-09-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Han Wang ,  Pei-Hsun Wang ,  Chun-Hsiung Lin ,  Chih-Hao Wang

IPC: H01L29/78 ,  H01L21/02 ,  H01L29/08 ,  H01L29/06 ,  H01L29/66

Abstract: Methods for manufacturing a semiconductor structure is provided. The method for manufacturing the semiconductor structure includes forming nanowire structures over a substrate and forming a gate structure across nanowire structures. The method for manufacturing the semiconductor structure also includes forming a source/drain structure adjacent to the gate structure and forming a Si layer over the source/drain structure. The method for manufacturing the semiconductor structure also includes forming a SiGe layer over the Si layer and oxidizing the SiGe layer to form an oxide layer. The method for manufacturing the semiconductor structure also includes forming a contact through the Si layer over the source/drain structure.

公开(公告)号：US11264485B2

公开(公告)日：2022-03-01

申请号：US16662333

申请日：2019-10-24

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Han Wang ,  Ding-Kang Shih ,  Chun-Hsiung Lin ,  Teng-Chun Tsai ,  Zhi-Chang Lin ,  Akira Mineji ,  Yao-Sheng Huang

IPC: H01L29/66 ,  H01L29/06 ,  H01L29/78

Abstract: The present disclosure describes an inner spacer structure for a semiconductor device and a method for forming the same. The method for forming the inner spacer structure in the semiconductor device can include forming a vertical structure over a substrate, forming a gate structure over a portion of the vertical structure, exposing sidewalls of the portion of the vertical structure, forming multiple spacers over the sidewalls of the portion of the vertical structure, and forming a void in each of the multiple spacers.

公开(公告)号：US11063042B2

公开(公告)日：2021-07-13

申请号：US16595373

申请日：2019-10-07

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chen-Han Wang ,  Chun-Hsiung Lin

IPC: H01L27/088 ,  H01L21/8234 ,  H01L21/32 ,  H01L29/417 ,  H01L21/8238 ,  H01L27/092

Abstract: A semiconductor device having a first region and a second region is provided. The first region has a first protruding structure and a second protruding structure. The second region has a third protruding structure and a fourth protruding structure. First, second, third, and fourth epi-layers are formed on the first, second, third, and fourth protruding structures, respectively. The first and second epi-layers are covered with a first photoresist layer while leaving the third and fourth epi-layers exposed. A dielectric layer is formed over the first photoresist layer and over the third and fourth epi-layers. A portion of the dielectric layer is covered with a second photoresist layer. The portion of the dielectric layer is formed over the third and fourth epi-layers. Portions of the dielectric layer not protected by the first and second photoresist layers are etched. The first and second photoresist layers are removed.