公开(公告)号：US20220246474A1

公开(公告)日：2022-08-04

申请号：US17583754

申请日：2022-01-25

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Hiroki MIYAKE ,  Tatsuji NAGAOKA

IPC: H01L21/78 ,  H01L21/425 ,  H01L21/479

Abstract: A method for manufacturing a semiconductor device includes: preparing a substrate made of a compound semiconductor containing a first element and a second element that is bonded to the first element and has an electronegativity smaller than that of the first element by 1.5 or more; causing an electric current to flow in the substrate; and dividing the substrate at a position including a current region where the electric current is caused to flow and along a cleavage plane of the substrate. A method for manufacturing a semiconductor device includes: stacking a first substrate and a second substrate each made of the compound semiconductor; and bonding the first substrate and the second substrate by causing an electric current to flow between the first substrate and the second substrate.

公开(公告)号：US20180019301A1

公开(公告)日：2018-01-18

申请号：US15602741

申请日：2017-05-23

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Yoshifumi YASUDA ,  Tatsuji NAGAOKA ,  Yasushi URAKAMI ,  Sachiko AOI

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/417 ,  H01L29/872 ,  H01L21/265 ,  H01L29/861 ,  H01L29/739 ,  H01L29/78

CPC classification number: H01L29/0619 ,  H01L21/0465 ,  H01L21/26513 ,  H01L21/26586 ,  H01L29/0688 ,  H01L29/0692 ,  H01L29/1608 ,  H01L29/417 ,  H01L29/6606 ,  H01L29/66136 ,  H01L29/66143 ,  H01L29/66333 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7811 ,  H01L29/861 ,  H01L29/872

Abstract: A semiconductor device may include an element region and a peripheral voltage withstanding region. The peripheral voltage withstanding region includes inner circumferential guard rings; and outer circumferential guard rings having a width narrower than a width of the inner circumferential guard rings. An interval between the inner circumferential guard rings is narrower than an interval between the outer circumferential guard rings. Each of the inner circumferential guard rings includes a first high concentration region and a first low concentration region. Each of the outer circumferential guard rings includes a second high concentration region and a second low concentration region. A width of a part of each first low concentration region that is exposed on a front surface of the semiconductor device is wider than a width of a part of each second low concentration region that is exposed on the front surface.

公开(公告)号：US20230207635A1

公开(公告)日：2023-06-29

申请号：US18062289

申请日：2022-12-06

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Atsushi WATANABE ,  Tatsuji NAGAOKA

IPC: H01L29/24 ,  H01L29/872 ,  H01L23/34

CPC classification number: H01L29/24 ,  H01L29/872 ,  H01L23/34

Abstract: A semiconductor device includes a semiconductor substrate having a rectangular shape with a side extending in a first direction and another side extending in a second direction. A thermal conductivity in the first direction of the semiconductor substrate is different from a thermal conductivity in the second direction of the semiconductor substrate. The semiconductor substrate is configured to satisfy a mathematical relation of L1/L2=(K1/K2)0.5 with an inclusive tolerance range of −5% to +5%, where L1 denotes a length of the semiconductor substrate in the first direction, L2 denotes a length of the semiconductor substrate in the second direction, K1 denotes the thermal conductivity in the first direction of the semiconductor substrate, and K2 denotes the thermal conductivity in the second direction of the semiconductor substrate.

公开(公告)号：US20230059168A1

公开(公告)日：2023-02-23

申请号：US17886986

申请日：2022-08-12

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation ,  NATIONAL UNIVERSITY CORPORATION KYOTO INSTITUTE OF TECHNOLOGY

Inventor： Tatsuji NAGAOKA ,  Hiroyuki NISHINAKA ,  Masahiro YOSHIMOTO

IPC: C30B25/14 ,  C30B25/10 ,  C30B25/20 ,  C30B29/16 ,  C23C16/40 ,  C23C16/448 ,  C23C16/46 ,  H01L21/02

Abstract: A film formation apparatus includes a stage, a heater, a mist supply source, a superheated vapor supply source, and a delivery device. The stage is configured to allow a substrate to be mounted thereon. The heater is configured to heat the substrate. The mist supply source is configured to supply mist of a solution that comprises solvent and a film material dissolved in the solvent. The superheated vapor supply source is configured to supply a superheated vapor of a same material as the solvent. The delivery device is configured to deliver the mist and the superheated vapor toward a surface of the substrate to grow a film containing the film material on the surface of the substrate.

公开(公告)号：US20200043823A1

公开(公告)日：2020-02-06

申请号：US16487007

申请日：2018-01-26

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Tatsuji NAGAOKA ,  Yusuke YAMASHITA ,  Yasushi URAKAMI

IPC: H01L23/34 ,  H01L29/417 ,  H01L29/06 ,  H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H01L29/32 ,  H01L29/16

Abstract: A semiconductor device includes a semiconductor substrate comprising an upper surface and a lower surface, an upper electrode provided on the upper surface, and a lower electrode provided on the lower surface. The semiconductor substrate includes, in a planar view, a first section including a center of the semiconductor substrate and a second section located between the first section and a peripheral edge of the semiconductor substrate. The first and second sections each comprise a MOSFET structure including a body diode. The MOSFET structure in the first section and the MOSFET structure in the second section are different from each other such that a forward voltage drop of the body diode in the first section with respect to a current density is higher than a forward voltage drop of the body diode in the second section with respect to the current density.

公开(公告)号：US20220181170A1

公开(公告)日：2022-06-09

申请号：US17522067

申请日：2021-11-09

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation ,  National University Corporation Kyoto Institute of Technology

Inventor： Tatsuji NAGAOKA ,  Hiroki MIYAKE ,  Hiroyuki NISHINAKA ,  Yuki KAJITA ,  Masahiro YOSHIMOTO

IPC: H01L21/67 ,  H01L21/306 ,  H01L21/02

Abstract: A wafer processing apparatus is configured to process a wafer by supplying mist to a surface of the wafer. The wafer processing apparatus includes a furnace in which the wafer is disposed, a gas supplying device configured to supply gas into the furnace, a mist supplying device configured to supply the mist into the furnace, and a controller. The controller is configured to execute a processing step by controlling the gas supplying device and the mist supplying device to supply the gas and the mist into the furnace, respectively. The controller is further configured to control the mist supplying device to stop supplying the mist into the furnace while controlling the gas supplying device to keep supplying the gas into the furnace when the processing step ends.

公开(公告)号：US20170278923A1

公开(公告)日：2017-09-28

申请号：US15519701

申请日：2015-10-19

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Tatsuji NAGAOKA ,  Hiroki MIYAKE ,  Shinichiro MIYAHARA ,  Sachiko AOI

IPC: H01L29/06 ,  H01L29/66 ,  H01L21/761 ,  H01L21/04 ,  H01L29/16 ,  H01L29/872

CPC classification number: H01L29/0623 ,  H01L21/0465 ,  H01L21/761 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/872

Abstract: A technique stabilizing properties of SBDs is provided. An SBD is provided with a p-type contact region in contact with an anode electrode, and an n-type drift region in Schottky contact with the anode electrode. The p-type contact region includes a first p-type region having a corner portion, a second p-type region connected to the corner portion, and an edge filling portion located at a connection between the first p-type region and the second p-type region. First and second extended lines intersect at an acute angle, where the first extended line is a line extended from a contour of the first p-type region toward the connection and the second extended line is a line extended from a contour of the second p-type region toward the connection. An acute angle edge formed between the first extended line and the second extended line is filled with the edge filling portion.

公开(公告)号：US20160300960A1

公开(公告)日：2016-10-13

申请号：US15092929

申请日：2016-04-07

Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHA ,  DENSO CORPORATION

Inventor： Hiroki MIYAKE ,  Tatsuji NAGAOKA ,  Shinichiro MIYAHARA ,  Sachiko AOI

IPC: H01L29/861 ,  H01L21/265 ,  H01L29/66

CPC classification number: H01L21/26513 ,  H01L29/0619 ,  H01L29/0692 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/872

Abstract: A diode is provided with a semiconductor substrate; an anode electrode located on a front surface of the semiconductor substrate; and a cathode electrode located on a rear surface of the semiconductor substrate. Each of the p-type contact regions includes: a first region being in contact with the anode electrode; a second region located on the rear surface side of the first region, having a p-type impurity density lower than a p-type impurity density in the first region; and a third region located on the rear surface side of the second region and having a p-type impurity density lower than the p-type impurity density in the second region. A thickness of the second region is thicker than a thickness of the first region.

Abstract translation: 二极管设置有半导体衬底; 位于所述半导体衬底的前表面上的阳极; 以及位于半导体衬底的后表面上的阴极电极。 每个p型接触区域包括：与阳极电极接触的第一区域; 位于所述第一区域的背面侧的第二区域，具有比所述第一区域中的p型杂质浓度低的p型杂质浓度; 以及位于第二区域的背面侧的第三区域，并且具有比第二区域中的p型杂质浓度低的p型杂质浓度。 第二区域的厚度比第一区域的厚度厚。

公开(公告)号：US20220005928A1

公开(公告)日：2022-01-06

申请号：US17477168

申请日：2021-09-16

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA

Inventor： Yuichi TAKEUCHI ,  Ryota SUZUKI ,  Tatsuji NAGAOKA ,  Sachiko AOI

IPC: H01L29/16 ,  H01L21/02 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/12

Abstract: In a guard ring section of a silicon carbide semiconductor device, an electric field relaxation layer for relaxing an electric field is formed in a surface layer portion of a drift layer, so that electric field is restricted from penetrating between guard rings. Thus, an electric field concentration is relaxed. Accordingly, a SiC semiconductor device having a required withstand voltage is obtained.

公开(公告)号：US20190288074A1

公开(公告)日：2019-09-19

申请号：US16427413

申请日：2019-05-31

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA

Inventor： Yuichi TAKEUCHI ,  Ryota SUZUKI ,  Tatsuji NAGAOKA ,  Sachiko AOI

IPC: H01L29/16 ,  H01L29/78 ,  H01L29/06 ,  H01L29/66 ,  H01L29/423 ,  H01L21/02

Abstract: In a guard ring section of a silicon carbide semiconductor device, an electric field relaxation layer for relaxing an electric field is formed in a surface layer portion of a drift layer, so that electric field is restricted from penetrating between guard rings. Thus, an electric field concentration is relaxed. Accordingly, a SiC semiconductor device having a required withstand voltage is obtained.