Power transfer over an isolated capacitive barrier with controlled current

    公开(公告)号:US11817779B2

    公开(公告)日:2023-11-14

    申请号:US17958989

    申请日:2022-10-03

    摘要: Capacitively isolated current-loaded or current-driven charge pump circuits and related methods transfer electrical energy from a primary side to a secondary side over a capacitive isolation boundary, using a controlled current source to charge isolation capacitors with constant current, as opposed to current impulses, while maintaining output voltage within tolerance. The charge pump circuits provide DC-to-DC converters that can be used in isolated power supplies, particularly in low-power applications and in such devices as sensor transmitters that have separate electrical ground planes. The devices and methods transfer electrical energy over an isolated capacitive barrier in a manner that is efficient, inexpensive, and reduces electromagnetic interference (EMI).

    POWER TRANSFER OVER AN ISOLATED CAPACITIVE BARRIER WITH CONTROLLED CURRENT

    公开(公告)号:US20230028100A1

    公开(公告)日:2023-01-26

    申请号:US17958989

    申请日:2022-10-03

    摘要: Capacitively isolated current-loaded or current-driven charge pump circuits and related methods transfer electrical energy from a primary side to a secondary side over a capacitive isolation boundary, using a controlled current source to charge isolation capacitors with constant current, as opposed to current impulses, while maintaining output voltage within tolerance. The charge pump circuits provide DC-to-DC converters that can be used in isolated power supplies, particularly in low-power applications and in such devices as sensor transmitters that have separate electrical ground planes. The devices and methods transfer electrical energy over an isolated capacitive barrier in a manner that is efficient, inexpensive, and reduces electromagnetic interference (EMI).

    In-wafer reliability testing
    7.
    发明授权

    公开(公告)号:US11543453B2

    公开(公告)日:2023-01-03

    申请号:US16730047

    申请日:2019-12-30

    摘要: An integrated circuit includes a semiconductor die having conductive pads and an electronic component with a first terminal coupled to a third conductive pad and a second terminal coupled to a fourth conductive pad. A resistor has a first terminal coupled to the fourth conductive pad and a second terminal coupled to the fifth conductive pad, and a first transistor has a first terminal coupled to the first conductive pad, a second terminal coupled to the fifth conductive pad, and a control terminal. A second transistor has a first terminal coupled to the first transistor, a second terminal coupled to the third conductive pad, and a control terminal. A pulse generator has an input coupled to the second conductive pad and an output coupled to the control terminal of the second transistor.

    PROCESS FOR THIN FILM CAPACITOR INTEGRATION

    公开(公告)号:US20220375836A1

    公开(公告)日:2022-11-24

    申请号:US17325197

    申请日:2021-05-19

    IPC分类号: H01L23/495 H01L23/00

    摘要: Disclosed embodiments include an integrated circuit (IC) comprising a silicon wafer, first and second conductive lines on the silicon wafer. There are first, second and third insulation blocks with portions on the first and second conductive lines and the silicon wafer, a metal pillar on the surface of the first conductive line opposite the silicon wafer, and a conductive adhesive block on the surface of the second conductive line opposite the silicon wafer. The IC also has a lead frame having first and second leads, and a capacitor having first and second capacitor terminals in which the first capacitor terminal is connected to the second lead using conductive adhesive, the second capacitor terminal is connected to the second conductive line through the conductive adhesive block, and the first lead is coupled to the first conductive line.

    Converter topology with adaptive power path architecture

    公开(公告)号:US10404175B2

    公开(公告)日:2019-09-03

    申请号:US15859031

    申请日:2017-12-29

    摘要: In described examples, a DC-DC converter provides electrical power. In response to an input voltage falling below a high voltage operation threshold, the converter repeatedly performs a first normal (N) phase and a second N phase. The first N phase includes delivering power through an inductor from the input voltage. The second N phase includes coupling an input terminal of the inductor to a ground. In response to the input voltage rising above a normal operation threshold, the converter performs a first high voltage (HV) phase, then a second HV phase, then a third HV phase, then the second HV phase, and then repeats from the first HV phase. The first HV phase includes delivering power through the inductor from the input voltage and charging a flying capacitor. The second HV phase includes coupling the input terminal of the inductor to the ground. The third HV phase includes delivering power through the inductor by discharging the flying capacitor through the inductor.