公开(公告)号：US11769662B2

公开(公告)日：2023-09-26

申请号：US17206908

申请日：2021-03-19

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Wei-Lin Chang ,  Chih-Chien Wang ,  Chihy-Yuan Cheng ,  Sz-Fan Chen ,  Chien-Hung Lin ,  Chun-Chang Chen ,  Ching-Sen Kuo ,  Feng-Jia Shiu

IPC分类号： H01L21/02 ,  H01L21/027

CPC分类号： H01L21/0206 ,  H01L21/0277

摘要： Embodiments are directed to a method for minimizing electrostatic charges in a semiconductor substrate. The method includes depositing photoresist on a semiconductor substrate to form a photoresist layer on the semiconductor substrate. The photoresist layer is exposed to radiation. The photoresist layer is developed using a developer solution. The semiconductor substrate is cleaned with a first cleaning liquid to wash the developer solution from the photoresist layer. A tetramethylammonium hydroxide (TMAH) solution is applied to the semiconductor substrate to reduce charges accumulated in the semiconductor substrate.

公开(公告)号：US11276699B2

公开(公告)日：2022-03-15

申请号：US16721565

申请日：2019-12-19

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chun-Chang Wu ,  Chihy-Yuan Cheng ,  Sz-Fan Chen ,  Shun-Shing Yang ,  Wei-Lin Chang ,  Ching-Sen Kuo ,  Feng-Jia Shiu ,  Chun-Chang Chen

IPC分类号： H01L27/11529 ,  H01L27/11546 ,  H01L21/311 ,  H01L21/3105 ,  H01L21/027 ,  H01L27/11521 ,  H01L29/66 ,  H01L29/423 ,  H01L23/544 ,  H01L27/11524 ,  H01L29/49 ,  H01L29/51

摘要： A wafer having a first region and a second region is provided. A first topography variation exists between the first region and the second region. A first layer is formed over the first region and over the second region of the wafer. The first layer is patterned. A patterned first layer causes a second topography variation to exist between the first region and the second region. The second topography variation is smoother than the first topography variation. A second layer is formed over the first region and the second region. At least a portion of the second layer is formed over the patterned first layer.

公开(公告)号：US10910260B2

公开(公告)日：2021-02-02

申请号：US16664455

申请日：2019-10-25

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Wei-Chieh Huang ,  Chin-Wei Liang ,  Feng-Jia Shiu ,  Hsia-Wei Chen ,  Jieh-Jang Chen ,  Ching-Sen Kuo

IPC分类号： H01L21/768 ,  H01L27/24 ,  H01L27/22 ,  H01L45/00 ,  H01L21/3105 ,  H01L21/66 ,  H01L43/12

摘要： A method for manufacturing a semiconductor device includes forming a structure protruding from a substrate, forming a dielectric layer covering the structure, forming a dummy layer covering the dielectric layer, and performing a planarization process to completely remove the dummy layer. A material of the dummy layer has a slower removal rate to the planarization process than a material of the dielectric layer.

公开(公告)号：US10734436B2

公开(公告)日：2020-08-04

申请号：US16142681

申请日：2018-09-26

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wei-Chao Chiu ,  Chih-Chien Wang ,  Feng-Jia Shiu ,  Ching-Sen Kuo ,  Chun-Wei Chang ,  Kai Tzeng

IPC分类号： G03F7/38 ,  H01L27/146 ,  G03F7/40 ,  H01L21/768 ,  G03F7/16 ,  G03F7/32 ,  H01L21/027 ,  H01L21/266 ,  H01L21/311

摘要： A first photoresist pattern and a second photoresist pattern are formed over a substrate. The first photoresist pattern is separated from the second photoresist pattern by a gap. A chemical mixture is coated on the first and second photoresist patterns. The chemical mixture contains a chemical material and surfactant particles mixed into the chemical material. The chemical mixture fills the gap. A baking process is performed on the first and second photoresist patterns, the baking process causing the gap to shrink. At least some surfactant particles are disposed at sidewall boundaries of the gap. A developing process is performed on the first and second photoresist patterns. The developing process removes the chemical mixture in the gap and over the photoresist patterns. The surfactant particles disposed at sidewall boundaries of the gap reduce a capillary effect during the developing process.

公开(公告)号：US11996432B2

公开(公告)日：2024-05-28

申请号：US17871985

申请日：2022-07-25

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Wei-Chao Chiu ,  Chun-Wei Chang ,  Ching-Sen Kuo ,  Feng-Jia Shiu

IPC分类号： H01L27/146 ,  G03F7/09

CPC分类号： H01L27/1463 ,  H01L27/14609 ,  H01L27/14685 ,  H01L27/14687 ,  G03F7/094

摘要： A method includes performing a first lithography process using a first pattern of a first photomask to form a first photoresist pattern on a front side of a device substrate; performing a first implantation process using the first pattern as a mask to form first isolation regions in the device substrate; after performing the first implantation process, performing a second lithography process using a second pattern of a second photomask to form a second photoresist pattern on the front side of the device substrate, the second pattern being shifted from the first pattern by a distance less than the first pitch and in the first direction; performing a second implantation process using the second photoresist pattern as a mask to form second isolation regions in the device substrate and spaced apart from the first isolation regions; and forming pixels between the first and second isolation regions.

公开(公告)号：US11665897B2

公开(公告)日：2023-05-30

申请号：US17694320

申请日：2022-03-14

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chun-Chang Wu ,  Chihy-Yuan Cheng ,  Sz-Fan Chen ,  Shun-Shing Yang ,  Wei-Lin Chang ,  Ching-Sen Kuo ,  Feng-Jia Shiu ,  Chun-Chang Chen

IPC分类号： H01L27/11546 ,  H01L21/311 ,  H01L21/3105 ,  H01L21/027 ,  H01L27/11521 ,  H01L29/66 ,  H01L29/423 ,  H01L23/544 ,  H01L27/11524 ,  H01L29/49 ,  H01L29/51

CPC分类号： H01L27/11546 ,  H01L21/0276 ,  H01L21/31058 ,  H01L21/31111 ,  H01L21/31144 ,  H01L23/544 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/6656 ,  H01L29/66825 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/517 ,  H01L2223/5442 ,  H01L2223/54426

摘要： A wafer having a first region and a second region is provided. A first topography variation exists between the first region and the second region. A first layer is formed over the first region and over the second region of the wafer. The first layer is patterned. A patterned first layer causes a second topography variation to exist between the first region and the second region. The second topography variation is smoother than the first topography variation. A second layer is formed over the first region and the second region. At least a portion of the second layer is formed over the patterned first layer.

公开(公告)号：US11049767B2

公开(公告)日：2021-06-29

申请号：US16584594

申请日：2019-09-26

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Tsai-Ming Huang ,  Wei-Chieh Huang ,  Hsun-Chung Kuang ,  Yen-Chang Chu ,  Cheng-Che Chung ,  Chin-Wei Liang ,  Ching-Sen Kuo ,  Jieh-Jang Chen ,  Feng-Jia Shiu ,  Sheng-Chau Chen

IPC分类号： H01L23/52 ,  H01L21/768 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/321 ,  H01L23/544 ,  H01L23/522

摘要： In a method of manufacturing a semiconductor device, a first interlayer dielectric (ILD) layer is formed over a substrate, a chemical mechanical polishing (CMP) stop layer is formed over the first ILD layer, a trench is formed by patterning the CMP stop layer and the first ILD layer, a metal layer is formed over the CMP stop layer and in the trench, a sacrificial layer is formed over the metal layer, a CMP operation is performed on the sacrificial layer and the metal layer to remove a portion of the metal layer over the CMP stop layer, and a remaining portion of the sacrificial layer over the trench is removed.

公开(公告)号：US10121811B1

公开(公告)日：2018-11-06

申请号：US15686916

申请日：2017-08-25

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Wei-Chao Chiu ,  Chih-Chien Wang ,  Feng-Jia Shiu ,  Ching-Sen Kuo ,  Chun-Wei Chang ,  Kai Tzeng

IPC分类号： H01L21/00 ,  H01L27/146

摘要： Implementations of the disclosure provide a method of fabricating an image sensor device. The method includes forming first trenches in a first photoresist layer using a first photomask having a first pattern to expose a first surface of a substrate, directing ions into the exposed first substrate through the first trenches to form first isolation regions in the substrate, removing the first photoresist layer, forming second trenches in a second photoresist layer using a second photomask having a second pattern to expose a second surface of the substrate, the second pattern being shifted diagonally from the first pattern by half mask pitch, directing ions into the exposed second surface through the second trenches to form second isolation regions in the substrate, the first and second isolation regions being alternatingly disposed in the substrate, and the first and second isolation regions defining pixel regions therebetween, and removing the second photoresist layer.

公开(公告)号：US20170186808A1

公开(公告)日：2017-06-29

申请号：US15062956

申请日：2016-03-07

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Wei-Chao Chiu ,  Chih-Chien Wang ,  Feng-Jia Shiu ,  Ching-Sen Kuo ,  Chun-Wei Chang ,  Kai Tzeng

IPC分类号： H01L27/146 ,  H01L21/311 ,  G03F7/32 ,  H01L21/266 ,  G03F7/16 ,  H01L21/027 ,  H01L21/768

CPC分类号： H01L27/14683 ,  G03F7/168 ,  G03F7/32 ,  G03F7/38 ,  G03F7/405 ,  H01L21/0273 ,  H01L21/266 ,  H01L21/31144 ,  H01L21/76802 ,  H01L27/14636 ,  H01L27/14643

摘要： A first photoresist pattern and a second photoresist pattern are formed over a substrate. The first photoresist pattern is separated from the second photoresist pattern by a gap. A chemical mixture is coated on the first and second photoresist patterns. The chemical mixture contains a chemical material and surfactant particles mixed into the chemical material. The chemical mixture fills the gap. A baking process is performed on the first and second photoresist patterns, the baking process causing the gap to shrink. At least some surfactant particles are disposed at sidewall boundaries of the gap. A developing process is performed on the first and second photoresist patterns. The developing process removes the chemical mixture in the gap and over the photoresist patterns. The surfactant particles disposed at sidewall boundaries of the gap reduce a capillary effect during the developing process.

公开(公告)号：US11411033B2

公开(公告)日：2022-08-09

申请号：US16818848

申请日：2020-03-13

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.

发明人： Wei-Chao Chiu ,  Chun-Wei Chang ,  Ching-Sen Kuo ,  Feng-Jia Shiu

IPC分类号： H01L27/146 ,  G03F7/09

摘要： A method includes forming a first photoresist layer on a front side of a device substrate and having first trenches spaced apart from each other. A first implantation process is performed using the first photoresist layer as a mask to form first isolation regions in the device substrate. A second photoresist layer is formed on the front side and has second trenches. A second implantation process is performed using the second photoresist layer as a mask to form second isolation regions in the device substrate and crossing over the first isolation regions. A third photoresist layer is formed on the front side and has third trenches spaced apart from each other. A third implantation process is performed using the third photoresist layer as a mask to form third isolation regions in the device substrate and crossing over the first isolation regions but spaced apart from the second isolation regions.