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    Method for manufacturing semiconductor package with connection structures including via groups
    4.
    发明授权
    Method for manufacturing semiconductor package with connection structures including via groups 有权

    公开(公告)号：US11532587B2

    公开(公告)日：2022-12-20

    申请号：US17170268

    申请日：2021-02-08

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Chien-Hsun Chen ,  Jiun Yi Wu ,  Chien-Hsun Lee ,  Chung-Shi Liu

    IPC分类号： H01L23/00 ,  H01L25/10 ,  H01L21/56

    摘要： A method includes placing a package component over a carrier, encapsulating the package component in an encapsulant, and forming a connection structure over and electrically coupling to the package component. The formation of the connection structure includes forming a first via group over and electrically coupling to the package component, forming a first conductive trace over and contacting the first via group, forming a second via group overlying and contacting the first conductive trace, wherein each of the first via group and the second via group comprises a plurality of vias, forming a second conductive trace over and contacting the second via group, forming a top via overlying and contacting the second conductive trace, and forming an Under-Bump-Metallurgy (UBM) over and contacting the top via.

    SEMICONDUCTOR PACKAGE AND METHOD
    6.
    发明申请
    SEMICONDUCTOR PACKAGE AND METHOD 有权

    公开(公告)号：US20220199461A1

    公开(公告)日：2022-06-23

    申请号：US17205383

    申请日：2021-03-18

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Chen-Hua Yu ,  Wei-Yu Chen ,  Jiun Yi Wu ,  Chung-Shi Liu ,  Chien-Hsun Lee

    IPC分类号： H01L21/768 ,  H01L23/538 ,  H01L21/56 ,  H01L23/31

    摘要： A method includes attaching interconnect structures to a carrier substrate, wherein each interconnect structure includes a redistribution structure; a first encapsulant on the redistribution structure; and a via extending through the encapsulant to physically and electrically connect to the redistribution structure; depositing a second encapsulant on the interconnect structures, wherein adjacent interconnect structures are laterally separated by the second encapsulant; after depositing the second encapsulant, attaching a first core substrate to the redistribution structure of at least one interconnect structure, wherein the core substrate is electrically connected to the redistribution structure; and attaching semiconductor devices to the interconnect structures, wherein the semiconductor devices are electrically connected to the vias of the interconnect structures.

    Semiconductor package
    7.
    发明授权
    Semiconductor package 有权

    公开(公告)号：US11244879B2

    公开(公告)日：2022-02-08

    申请号：US16746976

    申请日：2020-01-20

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Chi-Yang Yu ,  Chien-Hsun Lee ,  Jung-Wei Cheng ,  Tsung-Ding Wang ,  Yu-Min Liang

    IPC分类号： H01L23/31 ,  H01L23/522

    摘要： A semiconductor package including a first semiconductor device, a second semiconductor device, an insulating encapsulant, a redistribution structure and a supporting element is provided. The insulating encapsulant encapsulates the first semiconductor device and the second semiconductor device. The redistribution structure is over the first semiconductor device, the second semiconductor device and the insulating encapsulant. The redistribution structure is electrically connected to the first semiconductor device and the second semiconductor device. The supporting element is embedded in one of the insulating encapsulant and the redistribution structure.

    Package including metallic bolstering pattern and manufacturing method of the package
    8.
    发明授权
    Package including metallic bolstering pattern and manufacturing method of the package 有权

    公开(公告)号：US11177218B2

    公开(公告)日：2021-11-16

    申请号：US16824722

    申请日：2020-03-20

    申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

    发明人： Jiun-Yi Wu ,  Chien-Hsun Lee ,  Shou-Yi Wang ,  Chien-Hsun Chen

    IPC分类号： H01L25/065 ,  H01L23/538 ,  H01L23/31 ,  H01L21/52 ,  H01L23/00 ,  H01L21/56

    摘要： A package has a first semiconductor die, a second semiconductor die, a redistribution structure and a metallic bolstering pattern. The second semiconductor die is disposed beside the first semiconductor die and spaced apart from the first semiconductor die with a distance. The redistribution structure is disposed over the first semiconductor die and the second semiconductor die and is electrically connected with the first and second semiconductor dies. The metallic bolstering pattern is disposed between the redistribution structure and the first and second semiconductor dies. The metallic bolstering pattern is disposed on the redistribution structure and located over the first and second semiconductor dies, and the metallic bolstering pattern extends across the distance between the first and second semiconductor dies and extends beyond borders of the first and second semiconductor dies.