公开(公告)号：US20230170413A1

公开(公告)日：2023-06-01

申请号：US18095641

申请日：2023-01-11

申请人： Silergy Semiconductor Technology (Hangzhou) LTD

发明人： Meng Wang ,  Yicheng Du ,  Hui Yu

IPC分类号： H01L29/78 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/10 ,  H01L29/66 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06

CPC分类号： H01L29/7816 ,  H01L21/823864 ,  H01L21/823892 ,  H01L27/0928 ,  H01L29/1095 ,  H01L29/66681 ,  H01L21/823493 ,  H01L21/823814 ,  H01L21/823857 ,  H01L21/823878 ,  H01L27/088 ,  H01L27/0922 ,  H01L29/0623

摘要： A semiconductor device can include: a substrate having a first doping type; a first well region located in the substrate and having a second doping type, where the first well region is located at opposite sides of a first region of the substrate; a source region and a drain region located in the first region, where the source region has the second doping type, and the drain region has the second doping type; and a buried layer having the second doping type located in the substrate and below the first region, where the buried layer is incontact with the first well region, where the first region is surrounded by the buried layer and the first well region, and the first doping type is opposite to the second doping type.

公开(公告)号：US20220384430A1

公开(公告)日：2022-12-01

申请号：US17886230

申请日：2022-08-11

申请人： Silergy Semiconductor Technology (Hangzhou) LTD

发明人： Yicheng Du ,  Meng Wang ,  Hui Yu

IPC分类号： H01L27/088 ,  H01L21/762

摘要： An electrode structure can include: a semiconductor substrate; a trench extending from an upper surface of the semiconductor substrate into the semiconductor substrate; a contact region extending from the upper surface of the semiconductor substrate into the semiconductor substrate; and filling material in the trench, wherein the contact area is in contact with outer sidewalls of the trench.

公开(公告)号：US20220384427A1

公开(公告)日：2022-12-01

申请号：US17886161

申请日：2022-08-11

申请人： Silergy Semiconductor Technology (Hangzhou) LTD

发明人： Yicheng Du ,  Meng Wang ,  Hui Yu

IPC分类号： H01L27/06 ,  H01L21/761 ,  H01L49/02

摘要： A semiconductor structure can include: a semiconductor substrate having a first region, a second region, and an isolation region disposed between the first region and the second region; an isolation component located in the isolation region; and where the isolation component is configured to recombine first carriers flowing from the first region toward the second region, and to extract second carriers flowing from the second region toward the first region.

公开(公告)号：US20210193815A1

公开(公告)日：2021-06-24

申请号：US17193234

申请日：2021-03-05

申请人： Silergy Semiconductor Technology (Hangzhou) LTD

发明人： Budong You ,  Hui Yu ,  Meng Wang ,  Yicheng Du ,  Chuan Peng ,  Xunyi Song

IPC分类号： H01L29/49 ,  H01L21/265 ,  H01L21/762 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

摘要： A laterally diffused metal oxide semiconductor device can include: a well region having a second doping type; a reduced surface field effect layer of a first doping type formed by an implantation process in a predetermined region of the well region, where a length of the reduced surface field effect layer is less than a length of the well region; a body region of the first doping type extending from a top surface of the well region into the well region; a drain portion of the second doping type extending from the top surface of the well region into the well region; and an insulating structure located between the body region and the drain portion, at least a portion of the insulating structure is located on the top surface of the well region.

公开(公告)号：US10998416B2

公开(公告)日：2021-05-04

申请号：US16411318

申请日：2019-05-14

申请人： Silergy Semiconductor Technology (Hangzhou) LTD

发明人： Budong You ,  Hui Yu ,  Meng Wang ,  Yicheng Du ,  Chuan Peng ,  Xunyi Song

IPC分类号： H01L29/66 ,  H01L29/49 ,  H01L21/265 ,  H01L21/762 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40 ,  H01L29/423 ,  H01L29/78

摘要： A laterally diffused metal oxide semiconductor device can include: a well region having a second doping type; a reduced surface field effect layer of a first doping type formed by an implantation process in a predetermined region of the well region, where a length of the reduced surface field effect layer is less than a length of the well region; a body region of the first doping type extending from a top surface of the well region into the well region; a drain portion of the second doping type extending from the top surface of the well region into the well region; and an insulating structure located between the body region and the drain portion, at least a portion of the insulating structure is located on the top surface of the well region.

公开(公告)号：US20200058635A1

公开(公告)日：2020-02-20

申请号：US16537769

申请日：2019-08-12

申请人： Silergy Semiconductor Technology (Hangzhou) LTD

发明人： Jianping Qiu ,  Yicheng Du ,  Meng Wang

IPC分类号： H01L27/02 ,  H01L27/088

摘要： A semiconductor die can include: first, second, third, and fourth transistors disposed at intervals, where each two of the first, second, third, and fourth transistors are separated by a separation region to form four separation regions; an isolation structure having a first doping structure of a first doping type, and a second doping structure of a second doping type, to absorb hole carriers and electron carriers flowing between the first, second, third, and fourth transistors; where the first doping structure is located in the separation region to isolate adjacent transistors in the first, second, third, and fourth transistors; and where at least a portion of the second doping structure is surrounded by the first doping structure, and the second doping structure is separated from the first doping structure.

公开(公告)号：US11417647B2

公开(公告)日：2022-08-16

申请号：US16535391

申请日：2019-08-08

申请人： Silergy Semiconductor Technology (Hangzhou) LTD

发明人： Yicheng Du ,  Meng Wang ,  Hui Yu

IPC分类号： H01L27/06 ,  H01L21/761 ,  H01L49/02

摘要： A semiconductor structure can include: a semiconductor substrate having a first region, a second region, and an isolation region disposed between the first region and the second region; an isolation component located in the isolation region; and where the isolation component is configured to recombine first carriers flowing from the first region toward the second region, and to extract second carriers flowing from the second region toward the first region.

公开(公告)号：US11121251B2

公开(公告)日：2021-09-14

申请号：US16412587

申请日：2019-05-15

申请人： Silergy Semiconductor Technology (Hangzhou) LTD

发明人： Budong You ,  Hui Yu ,  Meng Wang ,  Yicheng Du ,  Chuan Peng ,  Xianguo Huang

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66

摘要： A laterally diffused metal oxide semiconductor device can include: a base layer; a source region and a drain region located in the base layer; a first dielectric layer located on a top surface of the base layer and adjacent to the source region; a voltage withstanding layer located on the top surface of the base layer and located between the first dielectric layer and the drain region; a first conductor at least partially located on the first dielectric layer; a second conductor at least partially located on the voltage withstanding layer; and a source electrode electrically connected to the source region, where the first and second conductors are spatially isolated, and the source electrode at least covers a space between the first and second conductors.

公开(公告)号：US09627513B2

公开(公告)日：2017-04-18

申请号：US14862453

申请日：2015-09-23

申请人： Silergy Semiconductor Technology (Hangzhou) Ltd.

发明人： Budong You ,  Meng Wang ,  Zheng Lyu

IPC分类号： H01L21/336 ,  H01L29/66 ,  H01L29/78 ,  H01L29/08 ,  H01L29/423 ,  H01L29/06

CPC分类号： H01L29/66681 ,  H01L29/0653 ,  H01L29/0878 ,  H01L29/42368 ,  H01L29/66689 ,  H01L29/7816

摘要： The present disclosure relates to a lateral double-diffused metal oxide semiconductor transistor and a method for manufacturing the same. In the method, a high-voltage gate dielectric is formed at a surface of a semiconductor layer. A thin gate dielectric is formed above the substrate and has at least a portion adjacent to the high-voltage gate dielectric. A gate conductor is formed above the thin gate dielectric and the high-voltage gate dielectric. A first mask is used for patterning the gate conductor to define a first sidewall of the gate conductor above the thin gate dielectric. A second mask is used for patterning the gate conductor to define a second sidewall of the gate conductor at least partially above the high-voltage gate dielectric. Source and drain regions are formed to have a first doping type. The method further comprises doping through the first mask to form a body region of a second doping type. The second doping type is opposite to the first doping type. The method simplifies a manufacturer process and improves reliability of the resultant devices.

公开(公告)号：US12119343B2

公开(公告)日：2024-10-15

申请号：US17886161

申请日：2022-08-11

申请人： Silergy Semiconductor Technology (Hangzhou) LTD

发明人： Yicheng Du ,  Meng Wang ,  Hui Yu

IPC分类号： H01L27/06 ,  H01L21/761 ,  H01L49/02

CPC分类号： H01L27/0635 ,  H01L21/761 ,  H01L28/10

摘要： A semiconductor structure can include: a semiconductor substrate having a first region, a second region, and an isolation region disposed between the first region and the second region; an isolation component located in the isolation region; and where the isolation component is configured to recombine first carriers flowing from the first region toward the second region, and to extract second carriers flowing from the second region toward the first region.