公开(公告)号：US07639473B2

公开(公告)日：2009-12-29

申请号：US11925590

申请日：2007-10-26

Applicant: Shih-Ping Hsu ,  Kan-Jung Chia

Inventor： Shih-Ping Hsu ,  Kan-Jung Chia

IPC: F23Q3/00

CPC classification number: H05K1/185 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/24 ,  H01L24/82 ,  H01L2224/24227 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01057 ,  H01L2924/014 ,  H01L2924/15787 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/30105 ,  H05K1/162 ,  H05K3/429 ,  H05K3/445 ,  H05K3/4608 ,  H05K3/4641 ,  H05K2201/09309 ,  H05K2201/09536 ,  H05K2201/10674 ,  H05K2203/0315 ,  H01L2924/00

Abstract: A circuit board structure with embedded electronic components includes: a carrier board having an adhesive layer with two surfaces formed with first and second metal oxide layers covered by first and second metal layers and having at least one through hole; at least one semiconductor chip received in the through hole of the carrier board; an adhesive material filling a gap between the through hole and the semiconductor chip so as to secure the semiconductor chip in position to the through hole; a high dielectric material layer formed outwardly on the second metal layer; and at least one electrode board formed outwardly on the high dielectric material layer such that a capacitance component is formed with the second metal layer, high dielectric material layer, and electrode board. Accordingly, the capacitance component is integrated into the circuit board structure.

Abstract translation: 具有嵌入式电子元件的电路板结构包括：具有粘合剂层的载体板，其具有形成有由第一和第二金属层覆盖并且具有至少一个通孔的第一和第二金属氧化物层的两个表面; 至少一个半导体芯片容纳在载板的通孔中; 填充通孔和半导体芯片之间的间隙的粘合材料，以将半导体芯片固定在通孔的适当位置; 在第二金属层上向外形成的高介电材料层; 以及至少一个在高电介质材料层上向外形成的电极板，使得电容元件形成有第二金属层，高介电材料层和电极板。 因此，电容分量被集成到电路板结构中。

公开(公告)号：US20090168380A1

公开(公告)日：2009-07-02

申请号：US12340445

申请日：2008-12-19

Applicant: Shih-Ping Hsu ,  Kan-Jung Chia

Inventor： Shih-Ping Hsu ,  Kan-Jung Chia

IPC: H05K1/18

CPC classification number: H05K1/185 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/18162 ,  H05K3/4644 ,  H05K2201/10674 ,  H05K2203/072 ,  H05K2203/1469

Abstract: A package substrate embedded with a semiconductor component is provided. A semiconductor chip is received in a cavity of a substrate body, and has electrode pads on an active surface thereof. A passivation layer is disposed on the active surface and has openings for exposing the electrode pads. An electroless plating metal layer, a first sputtering metal layer and a second sputtering metal layer are sequentially formed on the electrode pads, the openings of the passivation layer and the passivation layer surface around the openings. Contact pads are formed on the second sputtering metal layer. A first dielectric layer is disposed on the substrate body and the passivation layer. A first circuit layer is formed on the first dielectric layer. First conductive vias are formed in the first dielectric layer and electrically connected to the contact pads. The first circuit layer is electrically connected to the first conductive vias.

Abstract translation: 提供了嵌入半导体部件的封装基板。 半导体芯片被接收在基板主体的空腔中，并且在其有效表面上具有电极焊盘。 钝化层设置在有源表面上并具有用于暴露电极焊盘的开口。 在电极焊盘，钝化层的开口和开口周围的钝化层表面上依次形成化学镀金属层，第一溅射金属层和第二溅射金属层。 接触焊盘形成在第二溅射金属层上。 第一电介质层设置在衬底主体和钝化层上。 在第一电介质层上形成第一电路层。 第一导电通孔形成在第一电介质层中并电连接到接触焊盘。 第一电路层电连接到第一导电通孔。

公开(公告)号：US20080023819A1

公开(公告)日：2008-01-31

申请号：US11782356

申请日：2007-07-24

Applicant: Kan-Jung Chia ,  Shih-Ping Hsu

Inventor： Kan-Jung Chia ,  Shih-Ping Hsu

IPC: H01L23/48 ,  H01L21/52

CPC classification number: H01L23/5389 ,  H01L23/49816 ,  H01L24/19 ,  H01L24/24 ,  H01L2224/05001 ,  H01L2224/05008 ,  H01L2224/05023 ,  H01L2224/05548 ,  H01L2224/05569 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/24227 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: A package structure having a semiconductor chip embedded therein and a method of fabricating the same are disclosed. The package structure comprises: an aluminum oxide composite plate and a semiconductor chip. The aluminum oxide composite plate is formed by a stack consisting of an adhesive layer placed in between two aluminum oxide layers. The semiconductor chip having an active surface a plurality of electrode pads disposed thereon can be embedded and secured in the aluminum oxide composite plate. The present invention also comprises a method of fabricating the above-mentioned package structure. The present invention provides an excellent package structure, which can decrease the thickness of the package structure and make the package structure having characteristics of high rigidity and enduring tenacity at the same time.

Abstract translation: 公开了一种嵌入其中的半导体芯片的封装结构及其制造方法。 封装结构包括：氧化铝复合板和半导体芯片。 氧化铝复合板由叠置在两个氧化铝层之间的粘合剂层构成的叠层形成。 具有活性表面的多个电极焊盘的半导体芯片可嵌入并固定在氧化铝复合板中。 本发明还包括制造上述封装结构的方法。 本发明提供了一种优良的包装结构，其可以减小包装结构的厚度，并使包装结构同时具有高刚性和耐久性的特征。

公开(公告)号：US07582961B2

公开(公告)日：2009-09-01

申请号：US12020693

申请日：2008-01-28

Applicant: Kan-Jung Chia ,  Shih-Ping Hsu

Inventor： Kan-Jung Chia ,  Shih-Ping Hsu

IPC: H01L23/12 ,  H01L23/053

CPC classification number: H01L23/3128 ,  H01L23/13 ,  H01L23/3142 ,  H01L23/49816 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/19 ,  H01L24/20 ,  H01L24/29 ,  H01L24/83 ,  H01L2224/04105 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/05548 ,  H01L2224/12105 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/8385 ,  H01L2924/0001 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2924/00 ,  H01L2224/29099 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: A package structure with circuit directly connected to semiconductor chip, which comprises: a carrier board, a semiconductor chip, and at least a built-up structure. The carrier board is formed with a through cavity therein. The semiconductor chip is mounted in the through cavity of the carrier board, and a lateral surface of the semiconductor chip is coated by an adhesive material which is not contacted by the carrier board. The built-up structure, which includes a dielectric layer, is disposed on the surface of the carrier board and an active surface of the semiconductor chip. Part surface of the dielectric layer is exposed by the through cavity. The present invention decreases warpage of the packaging structure resulting from asymmetrical built-up structures.

Abstract translation: 具有直接连接到半导体芯片的电路的封装结构，其包括：载板，半导体芯片和至少一个建立结构。 载板在其中形成有通孔。 半导体芯片安装在承载板的通孔中，并且半导体芯片的侧表面由不与载板接触的粘合材料涂覆。 包括电介质层的积层结构设置在载体板的表面和半导体芯片的有效表面上。 电介质层的部分表面被通孔暴露。 本发明减少了由不对称组合结构引起的包装结构翘曲。

公开(公告)号：US20090032930A1

公开(公告)日：2009-02-05

申请号：US11832466

申请日：2007-08-01

Applicant: Shih-Ping Hsu ,  Chung-Cheng Lien ,  Shang-Wei Chen ,  Kan-Jung Chia

Inventor： Shih-Ping Hsu ,  Chung-Cheng Lien ,  Shang-Wei Chen ,  Kan-Jung Chia

IPC: H01L21/52 ,  H01L23/18

CPC classification number: H01L21/52 ,  H01L23/24 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2924/14 ,  H01L2924/18162 ,  H01L2924/00

Abstract: A packaging substrate having a chip embedded therein, comprises a first aluminum substrate having a first cavity therein; a second aluminum substrate having a second cavity corresponding to the first cavity; a dielectric layer disposed between the first aluminum substrate and the second aluminum substrate; a chip embedded in the first cavity and the second cavity, having an active surface with a plurality of electrode pads thereon; and one built-up structure disposed on the surface of the first aluminum substrate and the active surface of the chip, wherein the built-up structure has a plurality of conductive vias electrically connecting to the electrode pads. The substrate warpage is obviously reduced by the assistance of using aluminum or aluminum alloy as the material of the substrate. Also, a method of manufacturing a packaging substrate having a chip embedded therein is disclosed.

Abstract translation: 具有嵌入其中的芯片的封装基板包括其中具有第一腔的第一铝基板; 第二铝基板，具有对应于第一空腔的第二腔; 设置在所述第一铝基板和所述第二铝基板之间的电介质层; 嵌入在所述第一腔和所述第二腔中的芯片，具有其上具有多个电极焊盘的活性表面; 以及设置在第一铝基板的表面和芯片的有源表面上的一个堆积结构，其中，所述积层结构具有电连接到电极焊盘的多个导电通孔。 通过使用铝或铝合金作为基材的材料，显着减少了基板翘曲。 另外，公开了一种制造具有嵌入其中的芯片的封装衬底的方法。

公开(公告)号：US20080185704A1

公开(公告)日：2008-08-07

申请号：US11701409

申请日：2007-02-02

Applicant: Shih-Ping Hsu ,  Chung-Cheng Lien ,  Kan-Jung Chia ,  Shang-Wei Chen

Inventor： Shih-Ping Hsu ,  Chung-Cheng Lien ,  Kan-Jung Chia ,  Shang-Wei Chen

IPC: H01L21/00 ,  H01L23/48

CPC classification number: H05K3/4608 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/49833 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01016 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/18162 ,  H05K1/053 ,  H05K1/183 ,  H05K3/445 ,  H05K3/4641 ,  H05K3/4697 ,  H05K2201/09481 ,  H05K2201/10674 ,  H05K2203/0315

Abstract: A carrier plate structure having a chip embedded therein, comprises an aluminum plate having plural through-holes extending from the upper surface to the lower surface of the aluminum plate, a cavity therein, and an aluminum oxide layer formed on the surface of the aluminum plate; a chip embedded in the cavity with an active surface having plural electrode pads set thereon; and at least one build-up structure mounted on the surface of the aluminum plate and the active surface of the chip, wherein the build-up structure comprises at least one conductive structure to electrically connecting to the electrode pad. Besides, a method of manufacturing a carrier plate structure having a chip embedded therein is disclosed.

Abstract translation: 具有嵌入其中的芯片的载体板结构包括铝板，其具有从铝板的上表面延伸到下表面的多个通孔，其中形成有空腔，并且在铝板的表面上形成氧化铝层 ; 嵌入在所述腔中的芯片，其上设置有多个电极焊盘的有源表面; 以及至少一个堆积结构，其安装在所述铝板的表面和所述芯片的有源表面上，其中所述积聚结构包括至少一个导电结构以电连接到所述电极焊盘。 此外，公开了一种制造具有嵌入其中的芯片的载体板结构的方法。

公开(公告)号：US20080165515A1

公开(公告)日：2008-07-10

申请号：US11970112

申请日：2008-01-07

Applicant: Shih-Ping Hsu ,  Kan-Jung Chia

Inventor： Shih-Ping Hsu ,  Kan-Jung Chia

IPC: H05K7/00

CPC classification number: H05K1/185 ,  H01L23/50 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/73267 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/15787 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K1/053 ,  H05K1/162 ,  H05K3/4608 ,  H05K2201/09509 ,  H05K2201/09763 ,  H05K2201/10674 ,  H01L2924/00

Abstract: The present invention provides a circuit board having electronic components integrated therein, including a carrier board having an metallic oxide layer formed on each two surfaces of a metal layer, and having at least one through cavity; at least a semiconductor chip hold in the opening; at least a capacitor disposed on one surface of the carrier board, wherein the surface with the capacitor disposed thereon is at the same side with the active surface of the semiconductor chip. The capacitor is constituted of a first electrode plate disposed on partial surface of one side of the carrier board, a high dielectric material layer disposed on the surface of the first electrode plate, and a second electrode plate, paralleling and corresponding to the first electrode plate, disposed on the surface of the high dielectric material. The metal layer and the oxidation layer of the carrier board can enhance rigidity as well as tenacity and also integrate semiconductor chips and capacitors in the circuit board structure.

Abstract translation: 本发明提供了一种集成有电子部件的电路板，包括：载体板，其具有在金属层的每两个表面上形成的金属氧化物层，并具有至少一个通孔; 至少一个半导体芯片保持在开口中; 至少设置在所述载板的一个表面上的电容器，其中设置有所述电容器的所述表面与所述半导体芯片的有源表面处于同一侧。 电容器由设置在载板的一侧的部分表面上的第一电极板，设置在第一电极板的表面上的高介电材料层和与第一电极板相对应的第二电极板 ，设置在高电介质材料的表面上。 载体板的金属层和氧化层可以提高刚性和强度，并且还将半导体芯片和电容器集成在电路板结构中。

公开(公告)号：US20080164597A1

公开(公告)日：2008-07-10

申请号：US11649295

申请日：2007-01-04

Applicant: Shih-Ping Hsu ,  Chung-Cheng Lien ,  Kan-Jung Chia ,  Shang-Wei Chen

Inventor： Shih-Ping Hsu ,  Chung-Cheng Lien ,  Kan-Jung Chia ,  Shang-Wei Chen

IPC: H01L23/48

CPC classification number: H01L23/5389 ,  H01L23/49822 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/20 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/18162

Abstract: A plate structure having a chip embedded therein, comprises an aluminum plate having at least one aluminum oxide layer formed on its surface, and a cavity therein; a chip embedded in the cavity, wherein the chip has an active surface; at least one electrode pad mounted on the active surface; and a build-up structure mounted on the surface of the aluminum plate, the active surface of the chip, and the surface of the electrode pad, wherein the build-up structure comprises at least one conducting to electrically connect to the electrode pad. Besides, a method of manufacturing a plate structure having a chip embedded therein is disclosed. Therefore, the plate structure having a chip embedded therein can be processed by a simple method to achieve the tenacity of aluminum and the rigidity of aluminum oxide.

Abstract translation: 具有嵌入其中的芯片的板结构包括其表面上形成有至少一个氧化铝层的铝板及其中的空腔; 嵌入在所述腔中的芯片，其中所述芯片具有活性表面; 安装在所述有源表面上的至少一个电极焊盘; 以及安装在铝板的表面，芯片的有源表面和电极焊盘的表面上的积聚结构，其中积聚结构包括至少一个电连接到电极焊盘的导电体。 此外，公开了一种制造具有嵌入其中的芯片的板结构的方法。 因此，具有嵌入其中的芯片的板结构可以通过简单的方法来加工，以实现铝的强度和氧化铝的刚性。

公开(公告)号：US07969745B2

公开(公告)日：2011-06-28

申请号：US11970112

申请日：2008-01-07

Applicant: Shih-Ping Hsu ,  Kan-Jung Chia

Inventor： Shih-Ping Hsu ,  Kan-Jung Chia

IPC: H05K1/18 ,  H05K1/03

CPC classification number: H05K1/185 ,  H01L23/50 ,  H01L23/5389 ,  H01L24/19 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2224/73267 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/15787 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H05K1/053 ,  H05K1/162 ,  H05K3/4608 ,  H05K2201/09509 ,  H05K2201/09763 ,  H05K2201/10674 ,  H01L2924/00

Abstract: The present invention provides a circuit board having electronic components integrated therein, including a carrier board having an metallic oxide layer formed on each two surfaces of a metal layer, and having at least one through cavity; at least a semiconductor chip hold in the opening; at least a capacitor disposed on one surface of the carrier board, wherein the surface with the capacitor disposed thereon is at the same side with the active surface of the semiconductor chip. The capacitor is constituted of a first electrode plate disposed on partial surface of one side of the carrier board, a high dielectric material layer disposed on the surface of the first electrode plate, and a second electrode plate, paralleling and corresponding to the first electrode plate, disposed on the surface of the high dielectric material. The metal layer and the oxidation layer of the carrier board can enhance rigidity as well as tenacity and also integrate semiconductor chips and capacitors in the circuit board structure.

Abstract translation: 本发明提供了一种集成有电子部件的电路板，包括：载体板，其具有在金属层的每两个表面上形成的金属氧化物层，并具有至少一个通孔; 至少一个半导体芯片保持在开口中; 至少设置在所述载板的一个表面上的电容器，其中设置有所述电容器的所述表面与所述半导体芯片的有源表面处于同一侧。 电容器由设置在载板的一侧的部分表面上的第一电极板，设置在第一电极板的表面上的高介电材料层和与第一电极板相对应的第二电极板 ，设置在高电介质材料的表面上。 载体板的金属层和氧化层可以提高刚性和强度，并且还将半导体芯片和电容器集成在电路板结构中。

公开(公告)号：US20080029872A1

公开(公告)日：2008-02-07

申请号：US11701442

申请日：2007-02-02

Applicant: Shih-Ping Hsu ,  Chung-Cheng Lien ,  Kan-Jung Chia ,  Shang-Wei Chen

Inventor： Shih-Ping Hsu ,  Chung-Cheng Lien ,  Kan-Jung Chia ,  Shang-Wei Chen

IPC: H01L23/48 ,  H01L21/00

CPC classification number: H01L23/5389 ,  H01L24/19 ,  H01L25/105 ,  H01L2224/04105 ,  H01L2224/20 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/14 ,  H01L2924/18162 ,  H05K1/0306 ,  H05K1/183 ,  H05K3/02 ,  H05K3/4038 ,  H05K3/4605 ,  H05K3/4697 ,  H05K2203/0315 ,  H05K2203/1142

Abstract: A plate structure having a chip embedded therein, comprises an aluminum oxide plate having an upper surface, a lower surface, plural aluminum channels connected to the upper surface and the lower surface, and a cavity therein; a chip embedded in the cavity, wherein the chip has an active surface; at least one electrode pad mounted on the active surface; and at least one build-up structure mounted on the surface of the aluminum oxide plate and the active surface of the chip, wherein the build-up structure comprises at least one conductive structure to electrically connect to the electrode pad. Besides, a method of manufacturing a plate structure having a chip embedded therein is disclosed.

Abstract translation: 具有嵌入其中的芯片的板结构包括具有上表面，下表面，连接到上表面和下表面的多个铝通道和其中的空腔的氧化铝板; 嵌入在所述腔中的芯片，其中所述芯片具有活性表面; 安装在所述有源表面上的至少一个电极焊盘; 以及至少一个堆积结构，其安装在所述氧化铝板的表面和所述芯片的有源表面上，其中所述积聚结构包括至少一个电连接到所述电极焊盘的导电结构。 此外，公开了一种制造具有嵌入其中的芯片的板结构的方法。