摘要:
A vertical transistor includes a drain electrode disposed on a first region of a substrate, a drift layer disposed on a second region of the substrate spaced apart from the first region, and P-type gallium nitride current barrier layers disposed on the drift layer and comprising a current aperture disposed between current barrier layers. A channel layer is disposed on the drift layer and the current barrier layers. A semiconductor layer is disposed on the channel layer and configured to induce formation of a two-dimension electron gas layer adjacent to a top surface thereof. Metal contact plugs are disposed in the channel layer and contact the current barrier layers. A source electrode is disposed on the contact plugs and the channel layer. A gate insulation layer and a gate electrode are sequentially disposed on a top surface of the semiconductor layer opposite to the channel layer.
摘要:
Exemplary embodiments of the present invention disclose a unidirectional heterojunction transistor including a channel layer made of a first nitride-based semiconductor having a first energy bandgap, a barrier layer made of a second nitride-based semiconductor having a second energy bandgap different from the first energy bandgap, the barrier layer including a recess, a drain electrode disposed on a first region of the barrier layer, and a recessed-drain Schottky electrode disposed in the recess of the barrier layer, the recessed-drain Schottky electrode contacting the drain electrode.
摘要:
A vertical gallium nitride transistor according to an exemplary embodiment of the present invention includes a semiconductor structure including a first semiconductor layer of a first conductivity-type having a first surface and sidewalls, a second semiconductor layer of the first conductivity-type surrounding the first surface and the sidewalls of the first semiconductor layer, and a third semiconductor layer of a second conductivity-type disposed between the first semiconductor layer and the second semiconductor layer, the third semiconductor layer separating the first and second semiconductor layers from each other.
摘要:
A vertical gallium nitride transistor according to an exemplary embodiment of the present invention includes a semiconductor structure including a first semiconductor layer of a first conductivity-type having a first surface and sidewalls, a second semiconductor layer of the first conductivity-type surrounding the first surface and the sidewalls of the first semiconductor layer, and a third semiconductor layer of a second conductivity-type disposed between the first semiconductor layer and the second semiconductor layer, the third semiconductor layer separating the first and second semiconductor layers from each other.
摘要:
Exemplary embodiments of the present invention disclose a unidirectional heterojunction transistor including a channel layer made of a first nitride-based semiconductor having a first energy bandgap, a barrier layer made of a second nitride-based semiconductor having a second energy bandgap different from the first energy bandgap, the barrier layer including a recess, a drain electrode disposed on a first region of the barrier layer, and a recessed-drain Schottky electrode disposed in the recess of the barrier layer, the recessed-drain Schottky electrode contacting the drain electrode.
摘要:
A method of fabricating a nitride-based transistor includes sequentially forming a first nitride-based semiconductor layer doped with first type dopant, a second nitride-based semiconductor layer doped with at least one of a second type dopant, and a third nitride-based semiconductor layer doped with at least one of the first type dopants. A first trench is formed to penetrate the third and second nitride-based semiconductor layers and to extend into the first nitride-based semiconductor layer. A fourth nitride-based semiconductor layer doped with the first type dopants is formed to fill the first trench. A second trench is formed in the fourth nitride-based semiconductor layer. A gate electrode is formed in the second trench. A source electrode is formed to be electrically connected to at least one of the third and fourth nitride-based semiconductor layers, and a drain electrode is formed to be electrically connected to the first nitride-based semiconductor layer.