公开(公告)号：US20160276342A1

公开(公告)日：2016-09-22

申请号：US14988039

申请日：2016-01-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sun-Me LIM ,  Young-Dal LIM ,  Hag-Ju CHO

IPC: H01L27/088 ,  H01L29/423 ,  H01L27/12 ,  H01L29/78 ,  H01L29/06

CPC classification number: H01L27/0886 ,  H01L21/823431 ,  H01L21/823468 ,  H01L21/823481 ,  H01L21/823821 ,  H01L27/088 ,  H01L27/0924 ,  H01L29/0653 ,  H01L29/42356 ,  H01L29/785

Abstract: Semiconductor devices including STI liners are provided. The semiconductor devices may include a STI trench that defines an active region in a substrate, a STI liner that extends conformally along side walls and a bottom surface of the STI trench, a device isolation film that is on the STI liner and fills up at least a part of the STI trench, a first gate structure that is disposed on the active region, and a second gate structure that is spaced apart from the first gate structure. The second gate structure may include a gate insulating film contacting the device isolation film, a gate electrode on the gate insulating film, and spacers on both sides of the gate electrode. Lower surfaces of the spacers may contact an upper surface of the STI liner.

Abstract translation: 提供包括STI衬垫的半导体器件。 半导体器件可以包括限定衬底中的有源区的STI沟槽，沿侧壁和STI沟槽的底表面共形延伸的STI衬垫，STI衬套上的器件隔离膜，至少填满 STI沟槽的一部分，设置在有源区上的第一栅极结构和与第一栅极结构间隔开的第二栅极结构。 第二栅极结构可以包括与器件隔离膜接触的栅极绝缘膜，栅极绝缘膜上的栅极电极和栅电极两侧的间隔物。 间隔件的下表面可接触STI衬套的上表面。

公开(公告)号：US20160204114A1

公开(公告)日：2016-07-14

申请号：US15075715

申请日：2016-03-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sun-Me LIM ,  Kyung-Woo Kim ,  Myung-Soo Seo

IPC: H01L27/11 ,  H01L27/092

CPC classification number: H01L27/1116 ,  H01L21/823892 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/092 ,  H01L27/1104

Abstract: A semiconductor device includes first and second well regions having a first conductivity type, and a third well region between the first and second well regions having a second conductivity type different from the first conductivity type. A first active region is in the first well region. A second active region is in the second well region. A third active region is in the third well region. The third active region is closer to the second active region than to the first active region. A fourth active region is in the third well region. The fourth active region is closer to the first active region than to the second active region. A first conductive pattern is across the first and third active regions. A second conductive pattern is across the second and fourth active regions and parallel to the first conductive pattern.

Abstract translation: 半导体器件包括具有第一导电类型的第一阱区和第二阱区，以及具有不同于第一导电类型的第二导电类型的第一阱区和第二阱区之间的第三阱区。 第一个活跃区域在第一个井区域。 第二活性区位于第二阱区。 第三个活跃区域在第三个井区域。 第三有源区比第一有源区更靠近第二有源区。 第四个活跃区域位于第三个井区域。 第四有源区比第二有源区更靠近第一有源区。 第一导电图案跨越第一和第三有源区域。 第二导电图案跨越第二和第四有源区并平行于第一导电图案。

公开(公告)号：US20140103446A1

公开(公告)日：2014-04-17

申请号：US13940384

申请日：2013-07-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sun-Me LIM ,  Kyung-Woo KIM ,  Myung-Soo SEO

IPC: H01L27/092 ,  H01L27/088

CPC classification number: H01L27/1116 ,  H01L21/823892 ,  H01L27/0207 ,  H01L27/088 ,  H01L27/092 ,  H01L27/1104

Abstract: A semiconductor device includes first and second well regions having a first conductivity type, and a third well region between the first and second well regions having a second conductivity type different from the first conductivity type. A first active region is in the first well region. A second active region is in the second well region. A third active region is in the third well region. The third active region is closer to the second active region than to the first active region. A fourth active region is in the third well region. The fourth active region is closer to the first active region than to the second active region. A first conductive pattern is across the first and third active regions. A second conductive pattern is across the second and fourth active regions and parallel to the first conductive pattern.

Abstract translation: 半导体器件包括具有第一导电类型的第一阱区和第二阱区，以及具有不同于第一导电类型的第二导电类型的第一阱区和第二阱区之间的第三阱区。 第一个活跃区域在第一个井区域。 第二活性区位于第二阱区。 第三个活跃区域在第三个井区域。 第三有源区比第一有源区更靠近第二有源区。 第四个活跃区域位于第三个井区域。 第四有源区比第二有源区更靠近第一有源区。 第一导电图案跨越第一和第三有源区域。 第二导电图案跨越第二和第四有源区并平行于第一导电图案。