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公开(公告)号:US20220148948A1
公开(公告)日:2022-05-12
申请号:US17227850
申请日:2021-04-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Younghwan PARK , Jongseob KIM , Jaejoon OH , Soogine CHONG , Sunkyu HWANG
IPC: H01L23/495 , H01L23/31 , H01L23/00 , H01L21/56 , H01L23/367 , H01L29/20
Abstract: Provided are a semiconductor device package and/or a method of fabricating the semiconductor device package. The semiconductor device package may include a semiconductor device including a plurality of electrode pads on an upper surface of the semiconductor device, a lead frame including a plurality of conductive members bonded to the plurality of electrode pads, and a mold between the plurality of conductive members.
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公开(公告)号:US20220013659A1
公开(公告)日:2022-01-13
申请号:US17082478
申请日:2020-10-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Injun HWANG , Jaejoon OH , Soogine CHONG , Jongseob KIM , Joonyong KIM , Junhyuk PARK , Sunkyu HWANG
IPC: H01L29/778 , H01L29/20 , H01L29/40 , H01L29/66
Abstract: A high electron mobility transistor (HEMT) includes a channel layer comprising a group III-V compound semiconductor; a barrier layer comprising the group III-V compound semiconductor on the channel layer; a gate electrode on the barrier layer; a source electrode over gate electrode; a drain electrode spaced apart from the source electrode; and a metal wiring layer. A same layer of the metal wiring layer includes a gate wiring connected to the gate electrode, a source field plate connected to the source electrode, and a drain field plate connected to the drain electrode.
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公开(公告)号:US20220393029A1
公开(公告)日:2022-12-08
申请号:US17517987
申请日:2021-11-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Woochul JEON , Jaejoon OH , Sunkyu HWANG , Jongseob KIM , Soogine CHONG
IPC: H01L29/78 , H01L27/088 , H01L29/20
Abstract: A semiconductor device includes: a semiconductor substrate including a first surface and a second surface facing each other and including a first semiconductor material; a plurality of fin structures upwardly extending on the first surface of the semiconductor substrate, spaced apart from each other by a plurality of trenches, and including the first semiconductor material as the semiconductor substrate; an insulating layer on the first surface of the semiconductor substrate filling at least a portion of the plurality of trenches; a gate electrode layer between the plurality of fin structures and surrounded by the insulating layer; a first conductive layer covering the plurality of fin structures; a second conductive layer on the second surface of the semiconductor substrate; and a shield layer between the gate electrode layer and the semiconductor substrate, surrounded by the insulating layer, and electrically connected to the second conductive layer.
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公开(公告)号:US20210313465A1
公开(公告)日:2021-10-07
申请号:US17349327
申请日:2021-06-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Injun HWANG , Jongseob KIM , Joonyong KIM , Younghwan PARK , Junhyuk PARK , Dongchul SHIN , Jaejoon OH , Soogine CHONG , Sunkyu HWANG
Abstract: Provided is a field effect transistor (FET) including a gradually varying composition channel. The FET includes: a drain region; a drift region on the drain region; a channel region on the drift region; a source region on the channel region; a gate penetrating the channel region and the source region in a vertical direction; and a gate oxide surrounding the gate. The channel region has a gradually varying composition along the vertical direction such that an intensity of a polarization in the channel region gradually varies.
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公开(公告)号:US20220148947A1
公开(公告)日:2022-05-12
申请号:US17192439
申请日:2021-03-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Younghwan PARK , Jongseob KIM , Jaejoon OH , Soogine CHONG , Sunkyu HWANG
IPC: H01L23/495 , H01L23/31 , H01L21/48
Abstract: A semiconductor device package includes a lead frame, a semiconductor device including a first face connected to the lead frame, a second face that faces the first face, a gate pad, a drain pad, and a source pad, the gate pad exposed on the second face of the semiconductor, the drain pad exposed on the second face of the second face, and the source pad exposed on the second face, a gate clip connected to the gate pad, a drain clip connected to the drain pad, a source clip connected to the source pad, the source clip connected to the lead frame, and a molding that seals the lead frame, the semiconductor device, the source clip, the drain clip, and the gate clip.
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公开(公告)号:US20210399120A1
公开(公告)日:2021-12-23
申请号:US17098896
申请日:2020-11-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sunkyu HWANG , Joonyong KIM , Jongseob KIM , Junhyuk PARK , Boram KIM , Younghwan PARK , Dongchul SHIN , Jaejoon OH , Soogine CHONG , Injun HWANG
IPC: H01L29/778 , H01L29/66
Abstract: Provided is a high electron mobility transistor including: a channel layer comprising a 2-dimensional electron gas (2DEG); a barrier layer on the channel layer and comprising first regions and a second region, the first regions configured to induce the 2DEG of a first density in portions of the channel layer and the second region configured to induce the 2DEG of a second density different from the first density in other portions of the channel layer; source and drain electrodes on the barrier layer; a depletion formation layer formed on the barrier layer between the source and drain electrodes to form a depletion region in the 2DEG; and a gate electrode on the barrier layer. The first regions may include a first edge region and a second edge region corresponding to both ends of a surface of the gate electrode facing the channel layer.
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公开(公告)号:US20210118814A1
公开(公告)日:2021-04-22
申请号:US16868745
申请日:2020-05-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Younghwan PARK , Jongseob KIM , Joonyong KIM , Junhyuk PARK , Dongchul SHIN , Jaejoon OH , Soogine CHONG , Sunkyu HWANG , Injun HWANG
IPC: H01L23/00 , H01L29/20 , H01L29/205 , H01L29/778 , H01L29/15
Abstract: A semiconductor thin film structure may include a substrate, a buffer layer on the substrate, and a semiconductor layer on the buffer layer, such that the buffer layer is between the semiconductor layer and the substrate. The buffer layer may include a plurality of unit layers. Each unit layer of the plurality of unit layers may include a first layer having first bandgap energy and a first thickness, a second layer having second bandgap energy and a second thickness, and a third layer having third bandgap energy and a third thickness. One layer having a lowest bandgap energy of the first, second, and third layers of the unit layer may be between another two layers of the first, second, and third layers of the unit layer.
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公开(公告)号:US20240055330A1
公开(公告)日:2024-02-15
申请号:US18495697
申请日:2023-10-26
Applicant: Samsung Electronics Co., Ltd.
Inventor: Younghwan PARK , Jongseob KIM , Jaejoon OH , Soogine CHONG , Sunkyu HWANG
IPC: H01L23/495 , H01L21/48
CPC classification number: H01L23/49562 , H01L21/4825 , H01L23/4951 , H01L23/49524 , H01L23/49568
Abstract: A semiconductor device package includes a lead frame, a semiconductor device including a first face connected to the lead frame, a second face that faces the first face, a gate pad, a drain pad, and a source pad, the gate pad exposed on the second face of the semiconductor, the drain pad exposed on the second face of the second face, and the source pad exposed on the second face, a gate clip connected to the gate pad, a drain clip connected to the drain pad, a source clip connected to the source pad, the source clip connected to the lead frame, and a molding that seals the lead frame, the semiconductor device, the source clip, the drain clip, and the gate clip.
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公开(公告)号:US20220310833A1
公开(公告)日:2022-09-29
申请号:US17386729
申请日:2021-07-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dongchul SHIN , Boram KIM , Younghwan PARK , Jongseob KIM , Joonyong KIM , Junhyuk PARK , Jaejoon OH , Minchul YU , Soogine CHONG , Sunkyu HWANG , Injun HWANG
IPC: H01L29/778 , H01L29/20 , H01L29/205
Abstract: A high electron mobility transistor (HEMT) includes a channel layer, a plurality of barrier layers, and a p-type semiconductor layer. The barrier layers have an energy band gap greater than that of the channel layer. A gate electrode is arranged on the p-type semiconductor layer. A source electrode and a drain electrode are apart from the p-type semiconductor layer and the gate electrode on the barrier layers. Impurity concentrations of the barrier layers are different from each other in a drift area between the source electrode and the drain electrode.
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公开(公告)号:US20210184010A1
公开(公告)日:2021-06-17
申请号:US17016877
申请日:2020-09-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Soogine CHONG , Jongseob KIM , Joonyong KIM , Younghwan PARK , Junhyuk PARK , Dongchul SHIN , Jaejoon OH , Sunkyu HWANG , Injun HWANG
IPC: H01L29/423 , H01L23/31 , H01L29/20 , H01L29/205 , H01L29/40 , H01L29/778 , H01L21/02 , H01L21/285 , H01L21/765 , H01L29/66
Abstract: A semiconductor device includes a channel layer including a channel; a channel supply layer on the channel layer; a channel separation pattern on the channel supply layer; a gate electrode pattern on the channel separation pattern; and an electric-field relaxation pattern protruding from a first lateral surface of the gate electrode pattern in a first direction parallel with an upper surface of the channel layer. An interface between the channel layer and the channel supply layer is adjacent to channel. A size of the gate electrode pattern in the first direction is different from a size of the channel separation pattern in the first direction. The gate electrode pattern and the electric-field relaxation pattern form a single structure.
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