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公开(公告)号:US20230411393A1
公开(公告)日:2023-12-21
申请号:US18140789
申请日:2023-04-28
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Moosong LEE , Jinsun KIM , Inho KWAK , Dohyeon PARK , Yeeun HAN , Sang-Ho YUN , Seungyoon LEE , Nanhyung KIM
IPC: H01L27/092 , H01L29/66 , H01L29/78 , H01L21/8234 , H01L27/02
CPC classification number: H01L27/0924 , H01L29/66545 , H01L27/0207 , H01L21/823437 , H01L21/823475 , H01L29/7851
Abstract: A semiconductor device includes a substrate having a key region, a dummy active pattern on the key region, the dummy active pattern including a first impurity region and a second impurity region, a line structure provided on the first impurity region and extended in a first direction, a dummy gate electrode provided between the first and second impurity regions and extended in a second direction crossing the first direction, and a dummy contact disposed adjacent to a side of the line structure and connected to the second impurity region. The dummy contact includes a plurality of long contacts arranged in the second direction.
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公开(公告)号:US20220091497A1
公开(公告)日:2022-03-24
申请号:US17407425
申请日:2021-08-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sang-Ho YUN , Soo Kyung KIM , Jaikyun PARK , Donghoon LEE , Rankyung JUNG , Soonmok HA
IPC: G03F1/24 , H01L21/027
Abstract: A reflective mask includes a central region and first and second peripheral regions at opposite sides of the central region, respectively, the first peripheral region including a first out-of-band region having a first edge region extending in a first direction, and a first expansion region between the first edge region and the central region, and a first outer auxiliary region adjacent to the first expansion region of the first out-of-band region in the first direction, the first outer auxiliary region having a first auxiliary pattern region.
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公开(公告)号:US20240045342A1
公开(公告)日:2024-02-08
申请号:US18302375
申请日:2023-04-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Su Bin KONG , Sang-Ho YUN , Woo Jin JUNG
CPC classification number: G03F7/70625 , G03F7/0392 , G03F7/0025 , G03F7/2002 , G03F7/70466
Abstract: A method for inspecting a critical dimension may include providing a substrate, applying a photoresist on the substrate, variably irradiating a dose of light onto the photoresist, performing a photo process to develop the photoresist to form a photoresist pattern, performing an etching process using the photoresist pattern as an etching mask to form a plurality of patterns, measuring a width of each of the plurality of patterns and a spacing between adjacent ones of the plurality of patterns, and identifying a cause of a defect in the photo process based on the measured width and the measured spacing.
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