公开(公告)号：US10074632B2

公开(公告)日：2018-09-11

申请号：US15147922

申请日：2016-05-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Sub Song ,  Sang-Ho Park ,  Ki-Hong Jeong

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/10 ,  H01L23/31 ,  H01L25/18

CPC classification number: H01L25/0657 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/50 ,  H01L23/5384 ,  H01L23/5385 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/92 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2224/92125 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/107 ,  H01L2924/00014 ,  H01L2924/1434 ,  H01L2924/15311 ,  H05K1/181 ,  H05K3/3436 ,  H05K2201/09227 ,  H05K2201/10159 ,  H05K2201/10545 ,  Y02P70/611 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

Abstract: A solid-state drive (SSD) includes a main printed circuit board (PCB), and a first semiconductor package and a second semiconductor package respectively mounted on a top surface and a bottom surface of the main PCB. Each of the first and second semiconductor packages has a surface on which connection pads corresponding to a package ball map are disposed. The package ball map includes cells arranged in a plurality of rows and a plurality of columns, and one signal corresponds to each of the cells of the package ball map. The package ball map includes first signals corresponding to at least some of cells included in a selected reference column from among the plurality of columns, and at least one pair of second signals respectively corresponding to cells that are symmetrical to each other with respect to the reference column. The pair of second signals are swappable signals, and the first signals are not swappable signals.

公开(公告)号：US20240047409A1

公开(公告)日：2024-02-08

申请号：US18188368

申请日：2023-03-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Sub Song ,  Seongho Yoon ,  Ki-Hong Jeong

IPC: H01L23/00 ,  H01L25/16 ,  H01L23/528 ,  H01L23/495

CPC classification number: H01L24/73 ,  H01L25/16 ,  H01L23/5283 ,  H01L23/4952 ,  H01L24/85 ,  H01L2225/06506 ,  H01L2225/06517 ,  H01L2224/73207

Abstract: A semiconductor package includes a package substrate having opposing first and second surfaces, a control chip on the first surface, a mode selection connection terminal between the control chip and the package substrate, a stack structure comprising stacked memory chips spaced apart from the control chip on the first surface, a first power pad and a wire pad that are spaced apart at the first surface, a first external connection terminal on the second surface, and first and second interconnection lines in the package substrate. The first power pad and the wire pad are spaced apart from the control chip. The first interconnection line connects the first power pad to the first external connection terminal. The second interconnection line connects the wire pad to the mode selection connection terminal. The first external connection terminal is configured to provide a ground voltage or a power voltage.

公开(公告)号：US11452206B2

公开(公告)日：2022-09-20

申请号：US17029222

申请日：2020-09-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： In-Jae Lee ,  Youngdong Kim ,  Sang Sub Song ,  Ki-Hong Jeong

IPC: H05K1/00 ,  H05K1/11 ,  H01R12/71

Abstract: A card-type solid state drive (SSD) including: a substrate that has a first surface and a second surface facing each other; a memory controller and a nonvolatile memory device that are on the first surface; a plurality of functional terminals on the second surface; and a plurality of thermal terminals on the second surface, wherein the functional terminals include first-row functional terminals, second-row functional terminals, and third-row functional terminals, wherein at least one of the first-row functional terminals, at least one of the second-row functional terminals, and at least one of the third-row functional terminals are electrically connected to the memory controller or the nonvolatile memory device, and wherein the thermal terminals are not electrically connected to the memory controller or the nonvolatile memory device.

公开(公告)号：US09847319B2

公开(公告)日：2017-12-19

申请号：US15147925

申请日：2016-05-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-Sub Song ,  Sung-Wook Hwang ,  Yeoung-Jun Cho ,  Ki-Hong Jeong ,  Tae-Heum Kim

IPC: H01L25/065 ,  H01L25/00 ,  H01L23/31 ,  H01L25/16 ,  H01L23/00 ,  H01L25/10 ,  H01L25/18

CPC classification number: H01L25/0657 ,  H01L23/3128 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0655 ,  H01L25/105 ,  H01L25/16 ,  H01L25/18 ,  H01L25/50 ,  H01L2224/13025 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2225/06565 ,  H01L2225/06586 ,  H01L2225/06589 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2225/1082 ,  H01L2225/1088 ,  H01L2225/1094 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/15331 ,  H01L2924/1815 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/19105 ,  H01L2924/3511 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/45099

Abstract: A solid state drive (SSD) package type has a lower package including a lower package substrate, a controller chip mounted on the lower package substrate, and a plurality of upper packages disposed on the lower package as spaced apart from each other. The plurality of upper packages includes at least one non-volatile memory and at least one first individual electronic component. The upper packages are electrically connected to the lower package such that the package type is a package-on-package (PoP) type. The height of the first individual electronic component is greater than the spacing between the lower package and each of the upper packages.