Abstract:
A vertical type semiconductor device includes a substrate that has a plurality of trenches, a support pattern that fills the plurality of trenches and protrudes from a top surface of the substrate, a semiconductor layer disposed on the substrate that fills a space between the support patterns, a stacked structure disposed on the support pattern and the semiconductor layer that includes a plurality of insulation layers and a plurality of first conducive patterns that are alternately and repeatedly stacked, and a plurality of channel structures that penetrate through the structure and the semiconductor layer and that extend into the support pattern. Each channel structure includes a channel layer. At least a portion of the channel layer makes contact with the semiconductor layer.
Abstract:
A vertical type semiconductor device includes a substrate that has a plurality of trenches, a support pattern that fills the plurality of trenches and protrudes from a top surface of the substrate, a semiconductor layer disposed on the substrate that fills a space between the support patterns, a stacked structure disposed on the support pattern and the semiconductor layer that includes a plurality of insulation layers and a plurality of first conducive patterns that are alternately and repeatedly stacked, and a plurality of channel structures that penetrate through the structure and the semiconductor layer and that extend into the support pattern. Each channel structure includes a channel layer. At least a portion of the channel layer makes contact with the semiconductor layer.
Abstract:
A vertical type semiconductor device includes a substrate that has a plurality of trenches, a support pattern that fills the plurality of trenches and protrudes from a top surface of the substrate, a semiconductor layer disposed on the substrate that fills a space between the support patterns, a stacked structure disposed on the support pattern and the semiconductor layer that includes a plurality of insulation layers and a plurality of first conducive patterns that are alternately and repeatedly stacked, and a plurality of channel structures that penetrate through the structure and the semiconductor layer and that extend into the support pattern. Each channel structure includes a channel layer. At least a portion of the channel layer makes contact with the semiconductor layer.
Abstract:
A vertical type semiconductor device includes a substrate that has a plurality of trenches, a support pattern that fills the plurality of trenches and protrudes from a top surface of the substrate, a semiconductor layer disposed on the substrate that fills a space between the support patterns, a stacked structure disposed on the support pattern and the semiconductor layer that includes a plurality of insulation layers and a plurality of first conducive patterns that are alternately and repeatedly stacked, and a plurality of channel structures that penetrate through the structure and the semiconductor layer and that extend into the support pattern. Each channel structure includes a channel layer. At least a portion of the channel layer makes contact with the semiconductor layer.
Abstract:
A vertical memory device includes a channel, gate lines, and a cutting pattern, respectively, on a substrate. The channel extends in a first direction substantially perpendicular to an upper surface of the substrate. The gate lines are spaced apart from each other in the first direction. Each of the gate lines surrounds the channel and extends in a second direction substantially parallel to the upper surface of the substrate. The cutting pattern includes a first cutting portion extending in the first direction and cutting the gate lines, and a second cutting portion crossing the first cutting portion and merged with the first cutting portion.
Abstract:
A vertical type semiconductor device includes a substrate that has a plurality of trenches, a support pattern that fills the plurality of trenches and protrudes from a top surface of the substrate, a semiconductor layer disposed on the substrate that fills a space between the support patterns, a stacked structure disposed on the support pattern and the semiconductor layer that includes a plurality of insulation layers and a plurality of first conducive patterns that are alternately and repeatedly stacked, and a plurality of channel structures that penetrate through the structure and the semiconductor layer and that extend into the support pattern. Each channel structure includes a channel layer. At least a portion of the channel layer makes contact with the semiconductor layer.
Abstract:
A vertical type semiconductor device includes a substrate that has a plurality of trenches, a support pattern that fills the plurality of trenches and protrudes from a top surface of the substrate, a semiconductor layer disposed on the substrate that fills a space between the support patterns, a stacked structure disposed on the support pattern and the semiconductor layer that includes a plurality of insulation layers and a plurality of first conducive patterns that are alternately and repeatedly stacked, and a plurality of channel structures that penetrate through the structure and the semiconductor layer and that extend into the support pattern. Each channel structure includes a channel layer. At least a portion of the channel layer makes contact with the semiconductor layer.
Abstract:
Provided is a fabricating method of a nonvolatile memory. The fabricating method includes forming a plurality of gates extending in a first direction on a substrate to be adjacent to each other, forming a gap-fill layer filling at least a portion of a space between the plurality of gates, forming a supporter pattern supporting the plurality of gates on the plurality of gates and the gap-fill layer, and forming an air gap in the space between the plurality of gates by removing the gap-fill layer.
Abstract:
Provided is a fabricating method of a nonvolatile memory. The fabricating method includes forming a plurality of gates extending in a first direction on a substrate to be adjacent to each other, forming a gap-fill layer filling at least a portion of a space between the plurality of gates, forming a supporter pattern supporting the plurality of gates on the plurality of gates and the gap-fill layer, and forming an air gap in the space between the plurality of gates by removing the gap-fill layer.