公开(公告)号：US11942162B2

公开(公告)日：2024-03-26

申请号：US17736250

申请日：2022-05-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyung Soo Kim ,  Dae Han Kim ,  Jong Min Kim ,  Myoung Won Yoon

IPC: G11C16/34 ,  G11C16/04 ,  G11C16/08 ,  G11C16/24 ,  G11C29/12

CPC classification number: G11C16/24 ,  G11C16/0483 ,  G11C16/08 ,  G11C29/12005

Abstract: A method for operating a memory device is provided. The method includes providing a high voltage signal to a memory cell array including a plurality of memory cells using a first wiring, providing a logic signal to the memory cell array using a second wiring, and providing a shielding signal to the memory cell array using a third wiring arranged between the first wiring and the second wiring. A highest voltage level of the logic signal is lower than a highest voltage level of the high voltage signal, and the shielding signal includes a negative first voltage level in a first mode and a positive second voltage level in a second mode.

公开(公告)号：US11004484B2

公开(公告)日：2021-05-11

申请号：US16934134

申请日：2020-07-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong Sung Cho ,  Jeung Hwan Park ,  Jong Min Kim ,  Jung Kwan Kim

IPC: G11C7/00 ,  G11C7/06 ,  G11C7/10 ,  G11C11/4074 ,  G11C11/4094

Abstract: A memory device includes a memory cell array having a plurality of memory cell strings, and a plurality of bit lines connected to at least one of the plurality of memory cell strings; and a plurality of page buffers connected to the plurality of bit lines, wherein each of the plurality of page buffers includes a plurality of latches sharing one data transfer node and exchanging data with each other through the data transfer node; and a pass transistor setting a connection between the data transfer node and another data transfer node of another page buffer.

公开(公告)号：US10275204B2

公开(公告)日：2019-04-30

申请号：US15257529

申请日：2016-09-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Heon Kim ,  Jong Min Kim ,  Jae Hwan Lee ,  In Hyung Jung ,  Min Ho Kim ,  Jong Wu Baek ,  Cheong Jae Lee

IPC: G09G5/00 ,  G06F3/14 ,  G06F9/50 ,  G06F9/52 ,  G09G5/36 ,  G09G5/377 ,  H04L29/08

Abstract: An electronic device is provided. The electronic device includes an input interface configured to receive first input information relating to a sharing content operation, a communication interface configured to receive second input information relating to the sharing content operation from at least one external electronic device, a memory configured to store at least one instruction relating to processing of the sharing content, and a processor electronically connected to the input interface, the communication interface, and the memory, where the processor, upon executing the least one instruction, is configured to determine collision occurrence possibility of the first input information and the second input information, and to apply a specified effect corresponding to the collision occurrence possibility.

公开(公告)号：US10211661B2

公开(公告)日：2019-02-19

申请号：US14598651

申请日：2015-01-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Min Kim ,  Yeong Bok Choi

IPC: H02J7/00 ,  G01R31/36 ,  G01R17/00

Abstract: A charging control method of a computing system is provided. The method includes determining a charging mode for an external device connected to the computing system, charging the external device according to the charging mode, monitoring a current and a voltage in the computing system, and changing the charging mode based on the result of the monitoring.

公开(公告)号：US10209915B2

公开(公告)日：2019-02-19

申请号：US15099503

申请日：2016-04-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung Hwan Yun ,  Woo Joong Lee ,  Sei Jin Kim ,  Min Jung Kim ,  Jong Min Kim ,  Sung Jong Seo ,  Jun Beom Yeom ,  Sang Woo Lee ,  Jong Woo Hong

IPC: G06F3/06

Abstract: An electronic device is provided. The electronic device includes at least one first memory being nonvolatile and a processor configured to read a file from the first memory or to write a file on the first memory. The first memory stores instructions, the instructions, when executed, causing the processor to provide a software layer structure including a first virtual file system layer configured to interface with an application program layer, a compressed file system layer configured to compress at least a part of data of the written file or to decompress at least a part of data of the read file, a second virtual file system layer configured to manage the written or read file, and a first file system layer configured to read at least a part of the file from the first memory or to write at least a part of the file on the first memory.

公开(公告)号：US11508419B2

公开(公告)日：2022-11-22

申请号：US17227412

申请日：2021-04-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong Sung Cho ,  Jeung Hwan Park ,  Jong Min Kim ,  Jung Kwan Kim

IPC: G11C7/00 ,  G11C7/06 ,  G11C7/10 ,  G11C11/4074 ,  G11C11/4094

Abstract: A memory device includes a memory cell array having a plurality of memory cell strings, and a plurality of bit lines connected to at least one of the plurality of memory cell strings; and a plurality of page buffers connected to the plurality of bit lines, wherein each of the plurality of page buffers includes a plurality of latches sharing one data transfer node and exchanging data with each other through the data transfer node; and a pass transistor setting a connection between the data transfer node and another data transfer node of another page buffer.

公开(公告)号：US11416060B2

公开(公告)日：2022-08-16

申请号：US16763758

申请日：2018-11-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Min Kim

IPC: G06F1/26 ,  G06F1/32 ,  G06F1/3287 ,  H02J9/06 ,  H02J9/00

Abstract: Disclosed are a device and a method for reducing standby power consumption in an electronic device. An electronic device includes a power supply device for supplying power for driving the electronic device; and a system device driven on the basis of the power supplied from the power supply device, wherein the power supply device can include a AC-DC converter for converting alternating current power received from an external power device into direct current power; and a connection circuit for selectively connecting the external power device and the direct current converter on the basis of an operation mode of the electronic device. Other embodiments can be possible.

公开(公告)号：US11194603B2

公开(公告)日：2021-12-07

申请号：US16674088

申请日：2019-11-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Back Ki Kim ,  Jung Woo Lee ,  Jong Min Kim ,  Sung Hee Cho

IPC: G06F9/455 ,  G06F8/41 ,  G06F8/60 ,  G06F12/0862

Abstract: According to embodiments of the disclosure, a UE, a server, a control method of the UE, and a control method of the server may be provided to efficiently use storage space of the UE by performing AOT compilation based on the usage frequency of an application and function by a user and managing the AOT compiled machine code.

公开(公告)号：US11460909B2

公开(公告)日：2022-10-04

申请号：US16763758

申请日：2018-11-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Min Kim

IPC: G06F1/26 ,  G06F1/32 ,  G06F1/3287 ,  H02J9/06 ,  H02J9/00

Abstract: Disclosed are a device and a method for reducing standby power consumption in an electronic device. An electronic device includes a power supply device for supplying power for driving the electronic device; and a system device driven on the basis of the power supplied from the power supply device, wherein the power supply device can include a AC-DC converter for converting alternating current power received from an external power device into direct current power; and a connection circuit for selectively connecting the external power device and the direct current converter on the basis of an operation mode of the electronic device. Other embodiments can be possible.

公开(公告)号：US10720207B2

公开(公告)日：2020-07-21

申请号：US16210425

申请日：2018-12-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong Sung Cho ,  Jeung Hwan Park ,  Jong Min Kim ,  Jung Kwan Kim

IPC: G11C7/00 ,  G11C11/56 ,  G11C16/04 ,  G11C7/10 ,  G11C16/24 ,  G11C7/12 ,  G11C16/10

Abstract: A memory device includes a memory cell array having a plurality of memory cell strings, and a plurality of bit lines connected to at least one of the plurality of memory cell strings; and a plurality of page buffers connected to the plurality of bit lines, wherein each of the plurality of page buffers includes a plurality of latches sharing one data transfer node and exchanging data with each other through the data transfer node; and a pass transistor setting a connection between the data transfer node and another data transfer node of another page buffer.