公开(公告)号：US20240198604A1

公开(公告)日：2024-06-20

申请号：US18590206

申请日：2024-02-28

Applicant: Samsung Electronics Co., Ltd. ,  JM TECHNOLOGY CO., LTD.

Inventor： Jisung KIM ,  Hankil PARK ,  Sehwan HONG ,  Myeonggeun LEE ,  Seongjin JEONG

IPC: B29C65/00 ,  B29C63/00 ,  B29C63/22 ,  B29L31/34

CPC classification number: B29C66/8362 ,  B29C63/0004 ,  B29C63/22 ,  B29L2031/3437

Abstract: Disclosed is a film attachment apparatus for a housing of an electronic apparatus. The film attachment apparatus according to various embodiments, which adheres a film on the surface of a housing plate in an electronic apparatus having an edge portion having a curve, comprises: a jig configured to mount and fix the housing plate; a roller configured to press the film with respect to the housing plate; a vertical driving portion configured to move the roller from the upper portion to the lower portion of the surface of the housing plate, to which the film is adhered, and to press the roller with respect to the film; and a horizontal driving portion configured to move the roller from the surface of the housing plate in the direction toward the edge portion of the housing plate.

公开(公告)号：US20250048632A1

公开(公告)日：2025-02-06

申请号：US18673568

申请日：2024-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juhyung KIM ,  Jisung KIM ,  Chaeho KIM ,  Youjung KIM ,  Kwangmin PARK

IPC: H10B43/27 ,  H01L25/065 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40 ,  H10B51/10 ,  H10B51/20 ,  H10B51/40 ,  H10B80/00

Abstract: A semiconductor device may include a stack structure including interlayer insulating layers and gate electrodes alternately stacked in a vertical direction; a vertical pillar in a hole penetrating through the stack structure, the vertical pillar including a channel layer; and protrusions between the vertical pillar and the gate electrodes. The protrusions may be spaced apart from each other in the vertical direction. The protrusions may include a first data storage layer, a second data storage layer between the first data storage layer and the channel layer, and a first conductive layer in contact with a first side surface of the second data storage layer. A material of the second data storage layer may be from a material of the first data storage layer.

公开(公告)号：US20250169062A1

公开(公告)日：2025-05-22

申请号：US18936133

申请日：2024-11-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jungmin PARK ,  Jisung KIM ,  Beomjong KIM ,  Hyungsuk JUNG

IPC: H10B12/00 ,  H01L29/51

Abstract: Provided is a semiconductor device including a lower electrode, an upper electrode on the lower electrode, and a dielectric layer structure between the lower electrode and the upper electrode. The dielectric layer structure includes a first dielectric layer in contact with the lower electrode, a second dielectric layer in contact with the first dielectric layer, and a third dielectric layer in contact with the upper electrode. The first dielectric layer, the second dielectric layer, and the third dielectric layer include an anti-ferroelectric material. The anti-ferroelectric material of the first, second, and third dielectric layers are of the same material type, and a silicon dopant is included in a region adjacent to an interface between the first dielectric layer and the lower electrode, and a region adjacent to an interface between the third dielectric layer and the upper electrode.