公开(公告)号：US20240397716A1

公开(公告)日：2024-11-28

申请号：US18644739

申请日：2024-04-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Siyeong YANG ,  Yuyeon KIM ,  Chaeho KIM

IPC: H10B43/27 ,  G11C16/04 ,  H01L25/065 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B41/41 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40 ,  H10B80/00

Abstract: A semiconductor device includes a peripheral circuit structure including a plurality of circuits, and a cell array structure overlapping the peripheral circuit structure in a vertical direction. The cell array structure includes a common source line, a stack structure including a plurality of gate layers and a plurality of interlayer insulating layers which are alternately stacked on the common source line, and a plurality of channel structures in channel holes penetrating a memory cell area of the stack structure and connected to the common source line. Each of the plurality of channel structures includes a channel layer including an upper channel layer and a lower channel layer each having a single-crystal structure, and a crystal orientation of the upper channel layer is different from a crystal orientation of the lower channel layer.

公开(公告)号：US20250048632A1

公开(公告)日：2025-02-06

申请号：US18673568

申请日：2024-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Juhyung KIM ,  Jisung KIM ,  Chaeho KIM ,  Youjung KIM ,  Kwangmin PARK

IPC: H10B43/27 ,  H01L25/065 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40 ,  H10B51/10 ,  H10B51/20 ,  H10B51/40 ,  H10B80/00

Abstract: A semiconductor device may include a stack structure including interlayer insulating layers and gate electrodes alternately stacked in a vertical direction; a vertical pillar in a hole penetrating through the stack structure, the vertical pillar including a channel layer; and protrusions between the vertical pillar and the gate electrodes. The protrusions may be spaced apart from each other in the vertical direction. The protrusions may include a first data storage layer, a second data storage layer between the first data storage layer and the channel layer, and a first conductive layer in contact with a first side surface of the second data storage layer. A material of the second data storage layer may be from a material of the first data storage layer.