公开(公告)号：US20230215791A1

公开(公告)日：2023-07-06

申请号：US17933272

申请日：2022-09-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinmo Kwon

IPC: H01L23/498 ,  H01L23/31 ,  H01L23/00

CPC classification number: H01L23/49822 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/49816 ,  H01L24/48 ,  H01L24/16 ,  H01L23/49838 ,  H01L2224/48227 ,  H01L2224/16227 ,  H01L2224/45144 ,  H01L2224/45139 ,  H01L2224/45116 ,  H01L2224/45124 ,  H01L2224/45147 ,  H01L24/45 ,  H01L2224/32225 ,  H01L24/32 ,  H01L2224/05647 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05611 ,  H01L2224/05644 ,  H01L2224/05655 ,  H01L2224/05616 ,  H01L2224/05666 ,  H01L24/05 ,  H01L2224/13111 ,  H01L2224/13109 ,  H01L2224/13113 ,  H01L2224/1312 ,  H01L2224/13147 ,  H01L2224/13139 ,  H01L2224/13118 ,  H01L2224/13116 ,  H01L24/13 ,  H01L2224/85411 ,  H01L2224/85416 ,  H01L2224/85455 ,  H01L2224/85444 ,  H01L24/85 ,  H01L2224/81411 ,  H01L2224/81416 ,  H01L2224/81455 ,  H01L2224/81444 ,  H01L24/81 ,  H01L2224/73265 ,  H01L24/73

Abstract: A semiconductor package includes: a substrate including an insulating layer, a plurality of pads on the insulating layer, a surface protective layer covering the insulating layer and having first through-holes exposing at least a portion of the insulating layer and second through-holes exposing at least a portion of each of the plurality of pads, a plurality of first dummy patterns extending from the plurality of pads to the first through-holes, and a plurality of second dummy patterns extending from the first through-holes to an edge of the insulating layer; a semiconductor chip on the substrate and including connection terminals electrically connected to the plurality of pads exposed through the second through-holes; and an encapsulant encapsulating at least a portion of the semiconductor chip and filling the first through-holes, wherein a separation distance between the first through-holes is greater than a separation distance between the second through-holes.

公开(公告)号：US12249563B2

公开(公告)日：2025-03-11

申请号：US17473481

申请日：2021-09-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donguk Kim ,  Jinhee Hong ,  Jinmo Kwon

IPC: H01L23/498 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor device includes a substrate comprising a redistribution layer, a ball land provided on a bottom surface of the redistribution layer, a passivation layer surrounding the ball land on the bottom surface of the redistribution layer and spaced apart from the ball land by a space region formed between the passivation layer and the ball land, and a signal wiring line provided in the redistribution layer on the ball land, a semiconductor chip mounted on the substrate, and an external terminal adhered to the ball land. The signal wiring line includes a first wiring pattern extending in a first direction perpendicular to one side surface of the semiconductor chip, and a support pattern disposed under the one side surface of the semiconductor chip. A second width of the support pattern in a second direction is greater than a first width of the wiring pattern in the second direction.

公开(公告)号：US20240266276A1

公开(公告)日：2024-08-08

申请号：US18474336

申请日：2023-09-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinmo Kwon ,  Jitaek Oh ,  Hyoungjoon Kim

IPC: H01L23/498 ,  H01L21/48

CPC classification number: H01L23/49838 ,  H01L21/4857 ,  H01L23/49822 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204

Abstract: A strip substrate comprises a dielectric layer comprising a unit region and a saw line region, a saw line pattern on the saw line region, a conductive dummy pattern extending from the saw line pattern and toward the unit region, and power/ground patterns on the unit region. The power/ground pattern includes a first lateral surface that extends in a first direction and is proximate to the saw line pattern, a second lateral surface that extends in a second direction and is proximate to the conductive dummy pattern, and a third lateral surface that connects the first lateral surface and the second lateral surface.