公开(公告)号：US09947644B2

公开(公告)日：2018-04-17

申请号：US15268658

申请日：2016-09-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinhee Hong ,  Wansoo Park ,  Chul Park

IPC: H01L23/498 ,  H01L25/18 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L25/18 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/29 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/04042 ,  H01L2224/13025 ,  H01L2224/16146 ,  H01L2224/16227 ,  H01L2224/17181 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48465 ,  H01L2224/49109 ,  H01L2224/73257 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/92247 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/181 ,  H01L2224/48227 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/32245 ,  H01L2224/48247 ,  H01L2924/00 ,  H01L2224/85399

Abstract: A semiconductor package is provided. The semiconductor package may include a plurality of memory chips, which are mounted on a top surface of a package substrate, and a plurality of controller chips, which are vertically stacked on at least one of top and bottom surfaces of the package substrate.

公开(公告)号：US12249563B2

公开(公告)日：2025-03-11

申请号：US17473481

申请日：2021-09-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Donguk Kim ,  Jinhee Hong ,  Jinmo Kwon

IPC: H01L23/498 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor device includes a substrate comprising a redistribution layer, a ball land provided on a bottom surface of the redistribution layer, a passivation layer surrounding the ball land on the bottom surface of the redistribution layer and spaced apart from the ball land by a space region formed between the passivation layer and the ball land, and a signal wiring line provided in the redistribution layer on the ball land, a semiconductor chip mounted on the substrate, and an external terminal adhered to the ball land. The signal wiring line includes a first wiring pattern extending in a first direction perpendicular to one side surface of the semiconductor chip, and a support pattern disposed under the one side surface of the semiconductor chip. A second width of the support pattern in a second direction is greater than a first width of the wiring pattern in the second direction.