公开(公告)号：US20170018464A1

公开(公告)日：2017-01-19

申请号：US15211200

申请日：2016-07-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-Min KIM ,  Ji-Su KANG ,  Byung-Chan RYU ,  Jae-Hyun PARK ,  Yu-Ri LEE ,  Dong-Ho CHA

IPC: H01L21/8238 ,  H01L29/08 ,  H01L29/161 ,  H01L23/532 ,  H01L29/165 ,  H01L27/092 ,  H01L23/535 ,  H01L29/78 ,  H01L29/16

CPC classification number: H01L21/823871 ,  H01L21/76897 ,  H01L21/823814 ,  H01L21/823821 ,  H01L23/485 ,  H01L27/0924 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/665 ,  H01L29/7848 ,  H01L2029/7858

Abstract: A semiconductor device includes a first fin-type pattern and a second fin-type pattern which protrude upwardly from an upper surface of a field insulating film and extend in a first direction. A gate structure intersects the first fin-type pattern and the second fin-type pattern. A first epitaxial layer is on the first fin-type pattern on at least one side of the gate structure, and a second epitaxial layer is on the second fin-type pattern on at least one side of the gate structure. A metal contact covers outer circumferential surfaces of the first epitaxial layer and the second epitaxial layer. The first epitaxial layer contacts the second epitaxial layer.

Abstract translation: 半导体器件包括从场绝缘膜的上表面向上突出并沿第一方向延伸的第一鳍式图案和第二鳍片型图案。 栅极结构与第一鳍状图案和第二鳍片图案相交。 第一外延层位于栅极结构的至少一侧的第一鳍式图案上，第二外延层位于栅极结构的至少一侧上的第二鳍型图案上。 金属接触覆盖第一外延层和第二外延层的外圆周表面。 第一外延层接触第二外延层。

公开(公告)号：US20140192977A1

公开(公告)日：2014-07-10

申请号：US14139113

申请日：2013-12-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yong Ki LEE ,  Sun-Soo SHIN ,  Jonghoon SHIN ,  Kyoung Moon AHN ,  Ji-Su KANG ,  Kee Moon CHUN

IPC: H04L9/08 ,  G06F17/10

CPC classification number: G06F7/722 ,  G06F7/728 ,  H04L9/3013 ,  H04L9/302

Abstract: A multiplication method and a modular multiplier are provided. The multiplication method includes transforming a redundant-form multiplier by adding a recoding constant to the multiplier, performing recoding by using the transformed multiplier, and performing partial multiplication between the multiplier and a multiplicand using result values of the recoding.

Abstract translation: 提供乘法和模乘法。 乘法方法包括：通过向乘法器添加重新编码常数来变换冗余形式乘法器，通过使用变换乘数执行重新编码，并且使用重新编码的结果值来执行乘法器与乘法器之间的部分乘法。

公开(公告)号：US20130311533A1

公开(公告)日：2013-11-21

申请号：US13792642

申请日：2013-03-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong Ki LEE ,  Jonghoon SHIN ,  KyoungMoon AHN ,  Ji-Su KANG ,  Sun-Soo SHIN

IPC: G06F7/72

CPC classification number: G06F7/722 ,  G06F7/728

Abstract: A modular multiplier and a modular multiplication method are provided. The modular multiplier includes: a first register which stores a previous accumulation value calculated at a previous cycle; a second register which stores a previous quotient calculated at the previous cycle; a quotient generator which generates a quotient using the stored previous accumulation value output from the first register; and an accumulator which receives an operand, a bit value of a multiplier, the stored previous accumulation value, and the stored previous quotient to calculate an accumulation value in a current cycle, wherein the calculated accumulation value is updated to the first register, and the generated quotient is updated to the second register.

Abstract translation: 提供了一种模数乘法器和一种模乘法。 模数乘法器包括：第一寄存器，其存储在先前周期计算的先前累积值; 存储在前一周期计算的先前商的第二寄存器; 商产生器，其使用从所述第一寄存器输出的存储的先前累积值生成商; 以及累加器，其接收操作数，乘数的位值，存储的先前累积值和存储的先前商，以计算当前周期中的累加值，其中计算的累积值被更新为第一寄存器，并且 生成商被更新到第二个寄存器。

公开(公告)号：US20160357515A1

公开(公告)日：2016-12-08

申请号：US15242768

申请日：2016-08-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YONG KI LEE ,  JONGHOON SHIN ,  KyoungMoon AHN ,  Ji-Su KANG ,  Sun-Soo SHIN

IPC: G06F7/72

CPC classification number: G06F7/722 ,  G06F7/728

Abstract: A modular multiplier and a modular multiplication method are provided. The modular multiplier includes: a first register which stores a previous accumulation value calculated at a previous cycle; a second register which stores a previous quotient calculated at the previous cycle; a quotient generator which generates a quotient using the stored previous accumulation value output from the first register; and an accumulator which receives an operand, a bit value of a multiplier, the stored previous accumulation value, and the stored previous quotient to calculate an accumulation value in a current cycle, wherein the calculated accumulation value is updated to the first register, and the generated quotient is updated to the second register.