公开(公告)号：US20170076975A1

公开(公告)日：2017-03-16

申请号：US15359724

申请日：2016-11-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： WOOKYUNG YOU ,  JONGMIN BAEK ,  SANGHOON AHN ,  SANGHO RHA ,  NAEIN LEE

IPC: H01L21/768 ,  H01L21/02 ,  H01L21/311 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L21/7682 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02208 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02345 ,  H01L21/02348 ,  H01L21/311 ,  H01L21/31144 ,  H01L21/76834 ,  H01L21/76877 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present disclosure describes semiconductor devices and methods of fabricating the same. The method includes forming an interlayer insulating layer on a substrate and forming conductive patterns in the interlayer insulating layer. A pore density of an upper portion of the interlayer insulating layer is higher than that of a lower portion of the interlayer insulating layer, and a pore density of an intermediate portion of the interlayer insulating layer gradually increases toward the upper portion of the interlayer insulating layer. An air gap is provided between the conductive patterns.

Abstract translation: 本公开描述了半导体器件及其制造方法。 该方法包括在衬底上形成层间绝缘层，并在层间绝缘层中形成导电图案。 层间绝缘层的上部的孔密度高于层间绝缘层的下部的孔密度，层间绝缘层的中间部分的孔密度朝向层间绝缘层的上部逐渐增加 。 在导电图案之间设置气隙。

公开(公告)号：US20230251746A1

公开(公告)日：2023-08-10

申请号：US18135376

申请日：2023-04-17

Applicant: SAMSUNG ELECTRONICS CO., LTD

Inventor： CHADONG KIM ,  BUMSOO KIM ,  JONGMIN BAEK ,  GYEONGGON LEE ,  JINCHUL LEE ,  CHOONGHOON LEE ,  YUNRAE JO ,  YOONKYUNG CHOI

IPC: G06F3/044

CPC classification number: G06F3/044 ,  G06F2203/04112

Abstract: A sensing device includes a touch panel including first and second sensor electrodes, and a touch panel controller acquiring a sensing signal from the touch panel and detecting a user input based on the sensing signal. The touch panel controller acquires the sensing signal from at least one of the first sensor electrodes and the second sensor electrodes in a first mode operating at a first power. The touch panel controller selects a first transmitting electrode, a second transmitting electrode, and receiving electrodes from one of the first sensor electrodes and the second sensor electrodes, inputs a first driving signal to the first transmitting electrode, and inputs a second driving signal having a phase difference of 180 degrees with respect to the first driving signal to the second transmitting electrode in a second mode operating at a second power and a third mode in which a sensing operation is performed.

公开(公告)号：US20230072817A1

公开(公告)日：2023-03-09

申请号：US17849797

申请日：2022-06-27

Applicant: Samsung Electronics Co, Ltd.

Inventor： JUNGHWAN CHUN ,  HONGSIK SHIN ,  KOUNGMIN RYU ,  BONGKWAN BAEK ,  JONGMIN BAEK

IPC: H01L29/417 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L29/775 ,  H01L21/02 ,  H01L29/40 ,  H01L29/66

Abstract: A semiconductor device includes an active region extending on a substrate in a first direction, a gate structure including a gate electrode extending on the substrate in a second direction and traversing the active region, a spacer structure extending on opposing sidewalls of the gate electrode in the second direction, and a capping layer on the gate electrode and the spacer structure, a source/drain region on the active region adjacent the gate structure, and a first contact plug connected to the source/drain region and a second contact plug connected to the gate structure. The capping layer includes a lower capping layer and an upper capping layer on the lower capping layer, and the second contact plug penetrates through the capping layer, is connected to the gate electrode and includes a convex sidewall penetrating into the upper capping layer.

公开(公告)号：US20170323850A1

公开(公告)日：2017-11-09

申请号：US15659125

申请日：2017-07-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： SANGHO RHA ,  JONGMIN BAEK ,  WOOKYUNG YOU ,  SANGHOON AHN ,  NAEIN LEE

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/532 ,  H01L23/528 ,  H01L21/764

CPC classification number: H01L23/5226 ,  H01L21/764 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/7682 ,  H01L21/76837 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/5222 ,  H01L23/528 ,  H01L23/53223 ,  H01L23/53266 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/00 ,  H01L2924/0002

Abstract: A semiconductor device includes a substrate, a plurality of first conductive patterns disposed on the substrate and a plurality of second conductive patterns disposed on the first conductive patterns. Respective air gaps are disposed between adjacent ones of the first conductive patterns overlying a first region of the substrate, while adjacent ones of the first conductive patterns overlying a second region of the substrate do not have air gaps disposed therebetween. The air gaps may include first air gaps, and the device may further include second air gaps disposed between adjacent ones of the second conductive patterns in the second region. Adjacent ones of the second conductive patterns overlying a second region of the substrate may not have air gaps disposed therebetween.

公开(公告)号：US20220199789A1

公开(公告)日：2022-06-23

申请号：US17406310

申请日：2021-08-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNG SOO KIM ,  JOOHAN KIM ,  GYUHWAN AHN ,  IK SOO KIM ,  JONGMIN BAEK

IPC: H01L29/417 ,  H01L29/786 ,  H01L29/423

Abstract: A semiconductor device includes a first active pattern disposed on a substrate, a device isolation layer filling a trench that defines the first active pattern, a first channel pattern and a first source/drain pattern disposed on the first active pattern in which the first channel pattern includes semiconductor patterns stacked and spaced apart from each other, a gate electrode that extends and runs across the first channel pattern, a gate dielectric layer disposed between the first channel pattern and the gate electrode, and a first passivation pattern disposed between the device isolation layer and a first sidewall of the first active pattern. The first passivation pattern includes an upper part that protrudes upwardly from the device isolation layer, and a lower part buried in the device isolation layer. The gate dielectric layer covers the upper part of the first passivation pattern.

公开(公告)号：US20160247759A1

公开(公告)日：2016-08-25

申请号：US15146112

申请日：2016-05-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SANGHO RHA ,  JONGMIN BAEK ,  WOOKYUNG YOU ,  SANGHOON AHN ,  NAEIN LEE

IPC: H01L23/522 ,  H01L23/532 ,  H01L21/768 ,  H01L23/528

CPC classification number: H01L23/5226 ,  H01L21/764 ,  H01L21/76802 ,  H01L21/76816 ,  H01L21/7682 ,  H01L21/76837 ,  H01L21/76843 ,  H01L21/76877 ,  H01L23/5222 ,  H01L23/528 ,  H01L23/53223 ,  H01L23/53266 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/00 ,  H01L2924/0002

Abstract: A semiconductor device includes a substrate, a plurality of first conductive patterns disposed on the substrate and a plurality of second conductive patterns disposed on the first conductive patterns. Respective air gaps are disposed between adjacent ones of the first conductive patterns overlying a first region of the substrate, while adjacent ones of the first conductive patterns overlying a second region of the substrate do not have air gaps disposed therebetween. The air gaps may include first air gaps, and the device may further include second air gaps disposed between adjacent ones of the second conductive patterns in the second region. Adjacent ones of the second conductive patterns overlying a second region of the substrate may not have air gaps disposed therebetween.

公开(公告)号：US20150332955A1

公开(公告)日：2015-11-19

申请号：US14606970

申请日：2015-01-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： WOOKYUNG YOU ,  JONGMIN BAEK ,  SANGHOON AHN ,  SANGHO RHA ,  NAEIN LEE

IPC: H01L21/768 ,  H01L21/311 ,  H01L21/02

CPC classification number: H01L21/7682 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02208 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/02345 ,  H01L21/02348 ,  H01L21/311 ,  H01L21/31144 ,  H01L21/76834 ,  H01L21/76877 ,  H01L23/5222 ,  H01L23/53295 ,  H01L2221/1047 ,  H01L2924/0002 ,  H01L2924/00

Abstract: The present disclosure describes semiconductor devices and methods of fabricating the same. The method includes forming an interlayer insulating layer on a substrate and forming conductive patterns in the interlayer insulating layer. A pore density of an upper portion of the interlayer insulating layer is higher than that of a lower portion of the interlayer insulating layer, and a pore density of an intermediate portion of the interlayer insulating layer gradually increases toward the upper portion of the interlayer insulating layer. An air gap is provided between the conductive patterns.

Abstract translation: 本公开描述了半导体器件及其制造方法。 该方法包括在衬底上形成层间绝缘层，并在层间绝缘层中形成导电图案。 层间绝缘层的上部的孔密度高于层间绝缘层的下部的孔密度，层间绝缘层的中间部分的孔密度朝向层间绝缘层的上部逐渐增加 。 在导电图案之间设置气隙。

公开(公告)号：US20250060849A1

公开(公告)日：2025-02-20

申请号：US18937187

申请日：2024-11-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： CHADONG KIM ,  BUMSOO KIM ,  JONGMIN BAEK ,  GYEONGGON LEE ,  JINCHUL LEE ,  CHOONGHOON LEE ,  YUNRAE JO ,  YOONKYUNG CHOI

IPC: G06F3/044

Abstract: A sensing device includes a touch panel including first and second sensor electrodes, and a touch panel controller acquiring a sensing signal from the touch panel and detecting a user input based on the sensing signal. The touch panel controller acquires the sensing signal from at least one of the first sensor electrodes and the second sensor electrodes in a first mode operating at a first power. The touch panel controller selects a first transmitting electrode, a second transmitting electrode, and receiving electrodes from one of the first sensor electrodes and the second sensor electrodes, inputs a first driving signal to the first transmitting electrode, and inputs a second driving signal having a phase difference of 180 degrees with respect to the first driving signal to the second transmitting electrode in a second mode operating at a second power and a third mode in which a sensing operation is performed.

公开(公告)号：US20230378068A1

公开(公告)日：2023-11-23

申请号：US18098986

申请日：2023-01-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUNGHOO SHIN ,  SANGHYUN LEE ,  KOUNGMIN RYU ,  JONGMIN BAEK ,  KYUNGYUB JEON ,  KYU-HEE HAN

IPC: H01L23/532 ,  H01L27/092 ,  H01L29/417 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L23/522

CPC classification number: H01L23/5329 ,  H01L27/092 ,  H01L29/41725 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/775 ,  H01L23/5226

Abstract: A semiconductor device may include PMOSFET and NMOSFET regions spaced apart from each other on a substrate, first and second active patterns provided on the PMOSFET and NMOSFET regions, respectively, a first channel pattern on the first active pattern, a source/drain pattern electrically connected to the first channel pattern, an active contact electrically connected to the source/drain pattern, the active contact including a first conductive pattern and a first barrier pattern enclosing a portion of a side surface and a bottom surface of the first conductive pattern, a gate electrode extending in a direction crossing the first channel pattern, a gate contact electrically connected to the gate electrode, an air gap provided on the first barrier pattern and between the gate contact and the first conductive pattern, and a lower via provided on the active contact. The lower via may be adjacent to the air gap.

公开(公告)号：US20220384340A1

公开(公告)日：2022-12-01

申请号：US17530206

申请日：2021-11-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JUNGHOO SHIN ,  JONGMIN BAEK ,  SANGHOON AHN ,  WOOJIN LEE ,  JUNHYUK LIM

IPC: H01L23/528 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768

Abstract: A semiconductor integrated circuit device includes a substrate; a transistor on the substrate; an interlayer insulating film on the transistor; an insulating liner on the interlayer insulating film; a first insulating film on the insulating liner; and a first wiring layer on the interlayer insulating film and surrounded by the insulating liner. A height of a top surface of the first insulating film in a vertical direction from a main surface of the interlayer insulating film is different than a height of a top surface of the first wiring layer in the vertical direction. A step exists between the top surfaces of the first wiring layer and the first insulating film. A height of the first insulating film is greater than a height of the first wiring layer. A width of the first wiring layer gradually narrows as the first wiring layer extends upwards along the vertical direction.