公开(公告)号：US11211447B2

公开(公告)日：2021-12-28

申请号：US16282548

申请日：2019-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyukwoo Kwon ,  Ha-Young Yi ,  Byoungdeog Choi ,  Seongmin Choo

IPC: H01L27/108 ,  H01L49/02 ,  H01L21/311

Abstract: A semiconductor device includes a substrate, a bottom electrode on the substrate, a first support layer on the substrate next to a sidewall of the bottom electrode, a dielectric layer covering the sidewall and a top surface of the bottom electrode, and a top electrode on the dielectric layer. The bottom electrode includes a first part having a plurality of protrusions that protrude from a sidewall of the first part. The first part of the bottom electrode may be on the first support layer.

公开(公告)号：US10950607B2

公开(公告)日：2021-03-16

申请号：US16257260

申请日：2019-01-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seongmin Choo ,  Hyukwoo Kwon ,  Jangseop Kim

IPC: H01L27/108

Abstract: A semiconductor memory device includes lower electrodes, each of the lower electrodes surrounding an inner space, an upper support layer on top surfaces of the lower electrodes, the upper support layer being on the inner spaces surrounded by the lower electrodes, and an upper electrode on the upper support layer, the upper electrode filling first and second regions, the second region penetrating the upper support layer, and the first region extending from the second region into between the lower electrodes. Each of the lower electrodes includes a first portion overlapping with the first region, a top surface of the first portion being exposed by the upper support layer, and a second portion covered by the upper support layer, a top surface of the second portion being in contact with the upper support layer.

公开(公告)号：US12295136B2

公开(公告)日：2025-05-06

申请号：US17844623

申请日：2022-06-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Intak Jeon ,  Hyukwoo Kwon ,  Hanjin Lim

IPC: H10B12/00 ,  H01L49/02

Abstract: An integrated circuit semiconductor device includes a lower electrode formed on a substrate extending in a first direction and a second direction perpendicular to the first direction and a support structure supporting the lower electrode. The support structure includes a support pattern surrounding the lower electrode, extending in the first direction and the second direction, and having a hole through which the lower electrode passes, and a concavo-convex structure having at a surface of the support pattern a plurality of convex portions extending in a third direction perpendicular to the first direction and the second direction, and a plurality of concave portions arranged between the convex portions.

公开(公告)号：US11810947B2

公开(公告)日：2023-11-07

申请号：US17536524

申请日：2021-11-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyukwoo Kwon ,  Ha-young Yi ,  Byoungdeog Choi ,  Seongmin Choo

IPC: H01L45/00 ,  H01L49/02 ,  H01L21/311 ,  H10B12/00

CPC classification number: H01L28/90 ,  H01L21/31116 ,  H01L21/31144 ,  H01L28/92 ,  H10B12/033

Abstract: A semiconductor device includes a substrate, a bottom electrode on the substrate, a first support layer on the substrate next to a sidewall of the bottom electrode, a dielectric layer covering the sidewall and a top surface of the bottom electrode, and a top electrode on the dielectric layer. The bottom electrode includes a first part having a plurality of protrusions that protrude from a sidewall of the first part. The first part of the bottom electrode may be on the first support layer.

公开(公告)号：US11114398B2

公开(公告)日：2021-09-07

申请号：US16848194

申请日：2020-04-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongwoo Kim ,  Hyukwoo Kwon ,  Seongmin Choo ,  Byoungdeog Choi

IPC: H01L23/00

Abstract: An integrated circuit (IC) device includes a lower electrode formed on a substrate, and an upper support structure disposed around the lower electrode and supporting the lower electrode. The upper support structure includes an upper support pattern surrounding the lower electrode and extending in a lateral direction parallel to the substrate, the upper support pattern having a hole through which the lower electrode passes, and an upper spacer support pattern between the upper support pattern and the lower electrode inside the hole and having an outer sidewall in contact with the upper support pattern and an inner sidewall in contact with the lower electrode, wherein a width of the upper spacer support pattern in the lateral direction decreases in a direction toward the substrate. To manufacture an IC device, an upper support pattern is formed on a substrate. An upper spacer support film is formed to cover a sidewall and a top surface of the upper support pattern. A plurality of lower electrodes are formed inside a plurality of holes formed in the upper support pattern. Portions of the upper spacer support film are removed to form a plurality of upper spacer support patterns between the upper support pattern and the lower electrodes, respectively.

公开(公告)号：US10998318B2

公开(公告)日：2021-05-04

申请号：US16257260

申请日：2019-01-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seongmin Choo ,  Hyukwoo Kwon ,  Jangseop Kim

IPC: H01L27/108

Abstract: A semiconductor memory device includes lower electrodes, each of the lower electrodes surrounding an inner space, an upper support layer on top surfaces of the lower electrodes, the upper support layer being on the inner spaces surrounded by the lower electrodes, and an upper electrode on the upper support layer, the upper electrode filling first and second regions, the second region penetrating the upper support layer, and the first region extending from the second region into between the lower electrodes. Each of the lower electrodes includes a first portion overlapping with the first region, a top surface of the first portion being exposed by the upper support layer, and a second portion covered by the upper support layer, a top surface of the second portion being in contact with the upper support layer.

公开(公告)号：US20210082844A1

公开(公告)日：2021-03-18

申请号：US16848194

申请日：2020-04-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongwoo Kim ,  Hyukwoo Kwon ,  Seongmin Choo ,  Byoungdeog Choi

IPC: H01L23/00

Abstract: An integrated circuit (IC) device includes a lower electrode formed on a substrate, and an upper support structure disposed around the lower electrode and supporting the lower electrode. The upper support structure includes an upper support pattern surrounding the lower electrode and extending in a lateral direction parallel to the substrate, the upper support pattern having a hole through which the lower electrode passes, and an upper spacer support pattern between the upper support pattern and the lower electrode inside the hole and having an outer sidewall in contact with the upper support pattern and an inner sidewall in contact with the lower electrode, wherein a width of the upper spacer support pattern in the lateral direction decreases in a direction toward the substrate. To manufacture an IC device, an upper support pattern is formed on a substrate. An upper spacer support film is formed to cover a sidewall and a top surface of the upper support pattern. A plurality of lower electrodes are formed inside a plurality of holes formed in the upper support pattern. Portions of the upper spacer support film are removed to form a plurality of upper spacer support patterns between the upper support pattern and the lower electrodes, respectively.

公开(公告)号：US20200027947A1

公开(公告)日：2020-01-23

申请号：US16282548

申请日：2019-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyukwoo Kwon ,  Ha-Young YI ,  Byoungdeog CHOI ,  Seongmin CHOO

IPC: H01L49/02 ,  H01L27/108 ,  H01L21/311

Abstract: A semiconductor device includes a substrate, a bottom electrode on the substrate, a first support layer on the substrate next to a sidewall of the bottom electrode, a dielectric layer covering the sidewall and a top surface of the bottom electrode, and a top electrode on the dielectric layer. The bottom electrode includes a first part having a plurality of protrusions that protrude from a sidewall of the first part. The first part of the bottom electrode may be on the first support layer.

公开(公告)号：US11764119B2

公开(公告)日：2023-09-19

申请号：US17672939

申请日：2022-02-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seungheon Lee ,  Jaekang Koh ,  Hyukwoo Kwon ,  Munjun Kim ,  Taejong Han

IPC: H01L23/29 ,  H01L21/02 ,  H01L23/31

CPC classification number: H01L23/291 ,  H01L21/0228 ,  H01L23/3185

Abstract: A method of manufacturing an integrated circuit device, the method including forming a plurality of target patterns on a substrate such that an opening is defined between two adjacent target patterns; forming a pyrolysis material layer on the substrate such that the pyrolysis material layer partially fills the opening and exposes an upper surface and a portion of a sidewall of the two adjacent target patterns; and forming a material layer on the exposed upper surface and the exposed portion of the sidewall of the two adjacent target patterns, wherein, during the forming of the material layer, the material layer does not remain on a resulting surface of the pyrolysis material layer.

公开(公告)号：US20230117391A1

公开(公告)日：2023-04-20

申请号：US17844623

申请日：2022-06-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Intak Jeon ,  Hyukwoo Kwon ,  Hanjin Lim

IPC: H01L27/108

Abstract: An integrated circuit semiconductor device includes a lower electrode formed on a substrate extending in a first direction and a second direction perpendicular to the first direction and a support structure supporting the lower electrode. The support structure includes a support pattern surrounding the lower electrode, extending in the first direction and the second direction, and having a hole through which the lower electrode passes, and a concavo-convex structure having at a surface of the support pattern a plurality of convex portions extending in a third direction perpendicular to the first direction and the second direction, and a plurality of concave portions arranged between the convex portions.