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1.发明授权Methods of manufacturing integrated circuit devices by using photomask cleaning compositions 有权使用光掩模清洗组合物制造集成电路器件的方法公开(公告)号：US09507255B2
公开(公告)日：2016-11-29
申请号：US14750651
申请日：2015-06-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ho-young Kim , Dong-min Kang , Sung-bae Kim , Hoon Han , Hong-kwon Youn , Hyo-sun Lee , Young-taek Hong
Abstract: In a method of manufacturing an integrated circuit (IC) device, a photomask is wet-processed using a cleaning composition comprising an organic acid, an oxidizing agent, and deionized water (DIW).
Abstract translation: 在制造集成电路（IC）装置的方法中，使用包含有机酸，氧化剂和去离子水（DIW）的清洁组合物湿光处理光掩模。
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2.发明授权公开(公告)号：US10657209B2
公开(公告)日：2020-05-19
申请号：US15718305
申请日：2017-09-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ho-young Kim
IPC: G06F17/50
Abstract: Provided are a method of generating a functional coverage model from a hardware description language (HDL) code for a circuit design and performing verification of the circuit design by using the functional coverage model, and a computing system in which the method is performed.
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公开(公告)号：US10428242B2
公开(公告)日：2019-10-01
申请号：US15897261
申请日：2018-02-15
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Doo-sik Moon , Sang-hyun Park , Bo-un Yoon , Ho-young Kim , Se-jung Park , Jae-hak Lee , Jin-myung Hwang
Abstract: A slurry composition for chemical mechanical polishing, the slurry composition including ceramic polishing particles; a dispersion agent; a pH control agent and an additive having affinity with silicon nitride.
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公开(公告)号：US10055318B2
公开(公告)日：2018-08-21
申请号：US15681559
申请日：2017-08-21
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seong-hoon Jeong , Ho-young Kim , Soo-jung Ryu
IPC: G06F11/00 , G06F11/22 , G06F11/263 , G06F11/36
CPC classification number: G06F11/2236 , G06F11/263 , G06F11/3688
Abstract: A method and apparatus for generating a test bench for verifying a processor decoder are provided. The method including receiving an architecture description comprising processor decoder information, parsing the received architecture description into information for verifying the processor decoder, and generating the test bench to verify the processor decoder based on the parsed information.
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公开(公告)号：US10043879B1
公开(公告)日：2018-08-07
申请号：US15660432
申请日：2017-07-26
Applicant: Samsung Electronics Co., Ltd.
Inventor： Yoon-jae Kim , Ho-young Kim , Dong-kwon Kim , Jin-hyuk Yoo , Woo-jin Jung
IPC: H01L21/70 , H01L29/423 , H01L29/78 , H01L29/51 , H01L29/66
Abstract: A semiconductor device includes a fin active region protruding from a substrate and extending in a first direction, a gate electrode covering an upper surface and sidewalls of the fin active region and extending in a second direction crossing the first direction, a gate spacer structure on opposite sidewalls of the gate electrode, an insulating capping layer on the gate electrode and extending in the second direction, an insulating liner on opposite sidewalls of the gate electrode and on an upper surface of the gate spacer structure, and a self-aligned contact at a side of the gate electrode. The insulating liner may have a second thickness greater than a first thickness of the gate spacer structure. A sidewall of the self-aligned contact may be in contact with the gate spacer structure and the insulating liner.
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Patent Agency Ranking
公开(公告)号：US09772917B2
公开(公告)日：2017-09-26
申请号：US14259481
申请日：2014-04-23
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seong-hoon Jeong , Ho-young Kim , Soo-jung Ryu
IPC: G06F11/00 , G06F11/22 , G06F11/263 , G06F11/36
CPC classification number: G06F11/2236 , G06F11/263 , G06F11/3688
Abstract: A method and apparatus for generating a test bench for verifying a processor decoder are provided. The method including receiving an architecture description comprising processor decoder information, parsing the received architecture description into information for verifying the processor decoder, and generating the test bench to verify the processor decoder based on the parsed information.
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7.发明申请METHODS OF MANUFACTURING INTEGRATED CIRCUIT DEVICES BY USING PHOTOMASK CLEANING COMPOSITIONS 有权使用光电子清洁组合物制造集成电路器件的方法公开(公告)号：US20160116836A1
公开(公告)日：2016-04-28
申请号：US14750651
申请日：2015-06-25
Applicant: Samsung Electronics Co., Ltd.
Inventor： Ho-young Kim , Dong-min Kang , Sung-bae Kim , Hoon Han , Hong-kwon Youn , Hyo-sun Lee , Young-taek Hong
Abstract: In a method of manufacturing an integrated circuit (IC) device, a photomask is wet-processed using a cleaning composition comprising an organic acid, an oxidizing agent, and deionized water (DIW).
Abstract translation: 在制造集成电路（IC）装置的方法中，使用包含有机酸，氧化剂和去离子水（DIW）的清洁组合物湿光处理光掩模。
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公开(公告)号：US10453274B2
公开(公告)日：2019-10-22
申请号：US15689306
申请日：2017-08-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sun-min Kwon , Ho-young Kim , Hee-jun Shim
Abstract: Provided are a texture compressing method and a texture compressing apparatus, which compress some color information of a texture block, which is unable to realize all colors included in the texture block by a determined compression bit number, to be stored in a compression data bit of a texture block, which is able to realize all colors included in the texture block by a bit number lower than the determined compression bit number, based on a color distribution of each texture block, and a texture decompressing method and a texture decompressing apparatus corresponding to the texture compressing method and the texture compressing apparatus.
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9.发明申请公开(公告)号：US20180130263A1
公开(公告)日：2018-05-10
申请号：US15689306
申请日：2017-08-29
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sun-min Kwon , Ho-young Kim , Hee-jun Shim
CPC classification number: G06T19/20 , G06F3/1454 , G06F9/455 , G06F2009/4557 , G06T9/00 , G06T11/001 , G06T2210/32 , G06T2219/2012 , G09G2340/02 , H04N1/644
Abstract: Provided are a texture compressing method and a texture compressing apparatus, which compress some color information of a texture block, which is unable to realize all colors included in the texture block by a determined compression bit number, to be stored in a compression data bit of a texture block, which is able to realize all colors included in the texture block by a bit number lower than the determined compression bit number, based on a color distribution of each texture block, and a texture decompressing method and a texture decompressing apparatus corresponding to the texture compressing method and the texture compressing apparatus.
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公开(公告)号：US20150056795A1
公开(公告)日：2015-02-26
申请号：US14445284
申请日：2014-07-29
Applicant: SAMSUNG ELECTRONICS CO., LTD
Inventor： Bo-kyeong Kang , Bo-un Yoon , Il-young Yoon , Jae-kwang Choi , Ho-young Kim , Se-jung Park , Jae-seok Kim
IPC: H01L29/66 , H01L21/321 , H01L21/3213 , H01L21/28
CPC classification number: H01L29/66795 , H01L21/28008 , H01L21/32115 , H01L21/3212 , H01L21/32136 , H01L21/32139 , H01L29/785
Abstract: A method of manufacturing a semiconductor devices includes providing a semiconductor substrate that includes a channel region. The method includes forming a gate electrode material film including a stepped portion on the channel region. A sacrificial material film that has an etch selectivity that is the same as an etch selectivity of the gate electrode material film is formed. The sacrificial material film is planarized until a top surface of the gate electrode material film is exposed. The stepped portion is reduced by removing an exposed portion of the gate electrode material film.
Abstract translation: 制造半导体器件的方法包括提供包括沟道区的半导体衬底。 该方法包括在沟道区上形成包括阶梯部分的栅电极材料膜。 形成具有与栅电极材料膜的蚀刻选择性相同的蚀刻选择性的牺牲材料膜。 将牺牲材料膜平坦化，直到露出栅电极材料膜的顶表面。 通过去除栅电极材料膜的暴露部分来减小阶梯部分。
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